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72 lines
2.1 KiB
Diff
72 lines
2.1 KiB
Diff
From 9da48e3433b919868650cd60e28827273a42c63b Mon Sep 17 00:00:00 2001
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From: Jaxson Han <jaxson.han@arm.com>
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Date: Tue, 25 Jan 2022 14:56:36 +0800
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Subject: [PATCH] PSCI: Add function call entry point
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The max exception level of Armv8R AArch64 is EL2, which means it has no
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exclusive EL for firmware. That is, firmware and hypervisors have to share
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the EL2. Also, hypervisors cannot call firmware services via a 'smc'
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instruction. Thus, boot-wrapper has to provide a function entry point
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for Armv8R AArch64.
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Issue-Id: SCM-3816
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Upstream-Status: Inappropriate [other]
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Implementation pending further discussion
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Signed-off-by: Jaxson Han <jaxson.han@arm.com>
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Change-Id: I06ec8e50298603155c6d8ae2330e71db2f111182
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---
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common/psci.c | 24 ++++++++++++++++++++----
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1 file changed, 20 insertions(+), 4 deletions(-)
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diff --git a/common/psci.c b/common/psci.c
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index 6efc695..8fdefb5 100644
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--- a/common/psci.c
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+++ b/common/psci.c
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@@ -20,6 +20,8 @@
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extern unsigned int spsr_to_elx;
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+unsigned long flag_from_smc_fn[NR_CPUS];
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+
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static unsigned long branch_table[NR_CPUS];
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bakery_ticket_t branch_table_lock[NR_CPUS];
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@@ -49,12 +51,14 @@ static int psci_cpu_on(unsigned long target_mpidr, unsigned long address)
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return PSCI_RET_INVALID_PARAMETERS;
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bakery_lock(branch_table_lock, this_cpu);
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- ret = psci_store_address(cpu, address);
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- bakery_unlock(branch_table_lock, this_cpu);
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-
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#ifdef KEEP_EL
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- spsr_to_elx = SPSR_KERNEL_EL1;
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+ if (!flag_from_smc_fn[this_cpu]) {
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+ spsr_to_elx = SPSR_KERNEL_EL1;
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+ flush_per_cpu_data((void*)&(spsr_to_elx));
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+ }
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#endif
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+ ret = psci_store_address(cpu, address);
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+ bakery_unlock(branch_table_lock, this_cpu);
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return ret;
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}
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@@ -90,6 +94,18 @@ long psci_call(unsigned long fid, unsigned long arg1, unsigned long arg2)
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}
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}
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+long smc_fn_entry(unsigned long fid, unsigned long arg1, unsigned long arg2)
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+{
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+ long ret;
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+ unsigned int this_cpu = this_cpu_logical_id();
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+
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+ flag_from_smc_fn[this_cpu] = 1;
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+ ret = psci_call(fid, arg1, arg2);
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+ flag_from_smc_fn[this_cpu] = 0;
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+
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+ return ret;
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+}
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+
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void __noreturn psci_first_spin(unsigned int cpu)
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{
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if (cpu == MPIDR_INVALID)
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