Your Name
136 lines
3.2 KiB
Diff
136 lines
3.2 KiB
Diff
From 545f6950ae4dc55b4974986aa9629adb16eaf4e1 Mon Sep 17 00:00:00 2001
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From: Jaxson Han <jaxson.han@arm.com>
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Date: Tue, 25 May 2021 07:25:00 +0100
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Subject: [PATCH] aarch64: Rename labels and prepare for lower EL booting
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Prepare for booting from lower EL. Rename *_el3 relavant labels with
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*_el_max and *_no_el3 with *_keep_el. Since the original _no_el3 means
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"We neither do init sequence at this highest EL nor drop to lower EL
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when entering to kernel", we rename it with _keep_el to make it more
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clear for lower EL initialisation.
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Upstream-Status: Pending
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Signed-off-by: Jaxson Han <jaxson.han@arm.com>
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---
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arch/aarch64/boot.S | 28 ++++++++++++++++++++--------
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arch/aarch64/psci.S | 9 +++++----
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arch/aarch64/spin.S | 4 ++--
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3 files changed, 27 insertions(+), 14 deletions(-)
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diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S
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index d682ba5..fab694e 100644
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--- a/arch/aarch64/boot.S
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+++ b/arch/aarch64/boot.S
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@@ -34,18 +34,30 @@ ASM_FUNC(_start)
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/*
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* EL3 initialisation
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+ * Boot sequence
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+ * If CurrentEL == EL3, then goto EL3 initialisation and drop to
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+ * lower EL before entering the kernel.
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+ * Else, no initialisation and keep the current EL before
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+ * entering the kernel.
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*/
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mrs x0, CurrentEL
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cmp x0, #CURRENTEL_EL3
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- b.eq 1f
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+ b.eq el3_init
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+ /*
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+ * We stay in the current EL for entering the kernel
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+ */
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mov w0, #1
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- ldr x1, =flag_no_el3
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+ ldr x1, =flag_keep_el
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str w0, [x1]
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- b start_no_el3
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+ b start_keep_el
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-1: mov x0, #0x30 // RES1
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+ /*
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+ * EL3 initialisation
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+ */
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+el3_init:
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+ mov x0, #0x30 // RES1
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orr x0, x0, #(1 << 0) // Non-secure EL1
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orr x0, x0, #(1 << 8) // HVC enable
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@@ -145,7 +157,7 @@ ASM_FUNC(_start)
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bl gic_secure_init
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- b start_el3
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+ b start_el_max
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err_invalid_id:
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b .
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@@ -172,7 +184,7 @@ ASM_FUNC(jump_kernel)
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bl find_logical_id
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bl setup_stack // Reset stack pointer
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- ldr w0, flag_no_el3
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+ ldr w0, flag_keep_el
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cmp w0, #0 // Prepare Z flag
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mov x0, x20
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@@ -181,7 +193,7 @@ ASM_FUNC(jump_kernel)
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mov x3, x23
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b.eq 1f
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- br x19 // No EL3
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+ br x19 // Keep current EL
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1: mov x4, #SPSR_KERNEL
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@@ -199,5 +211,5 @@ ASM_FUNC(jump_kernel)
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.data
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.align 3
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-flag_no_el3:
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+flag_keep_el:
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.long 0
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diff --git a/arch/aarch64/psci.S b/arch/aarch64/psci.S
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index 8bd224b..7b8919a 100644
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--- a/arch/aarch64/psci.S
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+++ b/arch/aarch64/psci.S
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@@ -79,7 +79,7 @@ smc_exit:
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ldp x18, x19, [sp], #16
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eret
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-ASM_FUNC(start_el3)
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+ASM_FUNC(start_el_max)
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ldr x0, =vector
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bl setup_vector
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@@ -89,10 +89,11 @@ ASM_FUNC(start_el3)
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b psci_first_spin
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/*
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- * This PSCI implementation requires EL3. Without EL3 we'll only boot the
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- * primary cpu, all others will be trapped in an infinite loop.
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+ * This PSCI implementation requires the highest EL(EL3 or Armv8-R EL2).
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+ * Without the highest EL, we'll only boot the primary cpu, all othersr
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+ * will be trapped in an infinite loop.
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*/
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-ASM_FUNC(start_no_el3)
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+ASM_FUNC(start_keep_el)
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cpuid x0, x1
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bl find_logical_id
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cbz x0, psci_first_spin
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diff --git a/arch/aarch64/spin.S b/arch/aarch64/spin.S
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index 1ea1c0b..bfb1d47 100644
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--- a/arch/aarch64/spin.S
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+++ b/arch/aarch64/spin.S
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@@ -12,8 +12,8 @@
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.text
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-ASM_FUNC(start_el3)
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-ASM_FUNC(start_no_el3)
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+ASM_FUNC(start_el_max)
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+ASM_FUNC(start_keep_el)
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cpuid x0, x1
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bl find_logical_id
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