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2026-04-23 17:07:55 +08:00
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meta-luxshare/meta-common/recipes-bsp/u-boot/files/0001-Force-set-mac-from-eeprom-even-if-current-mac-is-val.patch
Executable
+61
View File
@@ -0,0 +1,61 @@
From 4d636c9d43fcaec7807e08c5cc7ba7984e18a58a Mon Sep 17 00:00:00 2001
From: "Chen.Zhao" <zhao.chen@luxshare-ict.com>
Date: Mon, 23 Dec 2024 16:29:06 +0800
Subject: [PATCH] Force set mac from eeprom even if current mac is valid
---
board/aspeed/evb_ast2600/evb_ast2600.c | 2 ++
cmd/nvedit.c | 3 +++
include/configs/aspeed-common.h | 2 ++
3 files changed, 7 insertions(+)
diff --git a/board/aspeed/evb_ast2600/evb_ast2600.c b/board/aspeed/evb_ast2600/evb_ast2600.c
index dfb4c7c7ef..62b2cb3585 100644
--- a/board/aspeed/evb_ast2600/evb_ast2600.c
+++ b/board/aspeed/evb_ast2600/evb_ast2600.c
@@ -220,6 +220,7 @@ int mac_read_from_eeprom(void)
u8 ethaddr[MAC_NUM*MAC_BYTE_SIZE];
char addr_str[100];
+ printf("mac_read_from_eeprom\n");
memset(ethaddr, 0, sizeof(ethaddr));
if (get_ethaddr_from_eeprom(ethaddr)) {
@@ -228,6 +229,7 @@ int mac_read_from_eeprom(void)
}
for (int i = 0; i < MAC_NUM; i++) {
if (is_valid_ethaddr(&ethaddr[MAC_BYTE_SIZE*i])) {
+ printf("eth%d mac:0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",i,ethaddr[0+6*i],ethaddr[1+6*i],ethaddr[2+6*i],ethaddr[3+6*i],ethaddr[4+6*i],ethaddr[5+6*i]);
memset(addr_str, 0, sizeof(addr_str));
if (i == 0) {
snprintf(addr_str, sizeof(addr_str), "ethaddr");
diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 24a6cf7824..2df944eefb 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -373,8 +373,11 @@ int eth_env_set_enetaddr(const char *name, const uint8_t *enetaddr)
{
char buf[ARP_HLEN_ASCII + 1];
+ /*Luxshare remark this code to force write ethaddr and not check current mac address */
+ #if 0
if (eth_env_get_enetaddr(name, (uint8_t *)buf))
return -EEXIST;
+ #endif
sprintf(buf, "%pM", enetaddr);
diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h
index 62570cea47..5892b28b2f 100644
--- a/include/configs/aspeed-common.h
+++ b/include/configs/aspeed-common.h
@@ -86,4 +86,6 @@
#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
#endif
+#define CONFIG_ENV_OVERWRITE
+
#endif /* __ASPEED_COMMON_CONFIG_H */
--
2.25.1
meta-luxshare/meta-common/recipes-bsp/u-boot/files/0001-Force-use-ctrl-l-to-entre-uboot-command-line.patch
Executable
+57
View File
@@ -0,0 +1,57 @@
From d562b57f2a21125bcfb7268099aa29dea6f005f2 Mon Sep 17 00:00:00 2001
From: "Chen.Zhao" <zhao.chen@luxshare-ict.com>
Date: Tue, 18 Mar 2025 17:43:34 +0800
Subject: [PATCH] Force use ctrl l to entre uboot command line
---
common/autoboot.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/common/autoboot.c b/common/autoboot.c
index d54f1c431f..9c1edfb16e 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -216,9 +216,9 @@ static int __abortboot(int bootdelay)
#ifdef CONFIG_MENUPROMPT
printf(CONFIG_MENUPROMPT);
#else
- printf("Hit any key to stop autoboot: %2d ", bootdelay);
+ printf("Hit ctrl+l to stop autoboot: %2d ", bootdelay);
#endif
-
+#if 0
/*
* Check if key already pressed
*/
@@ -227,21 +227,21 @@ static int __abortboot(int bootdelay)
puts("\b\b\b 0");
abort = 1; /* don't auto boot */
}
-
+#endif
while ((bootdelay > 0) && (!abort)) {
--bootdelay;
/* delay 1000 ms */
ts = get_timer(0);
do {
if (tstc()) { /* we got a key press */
- abort = 1; /* don't auto boot */
- bootdelay = 0; /* no more delay */
+ if(0x0c == getc()){ /* 0x0c is ctrl+l */
+ abort = 1; /* don't auto boot */
+ bootdelay = 0; /* no more delay */
# ifdef CONFIG_MENUKEY
- menukey = getc();
-# else
- (void) getc(); /* consume input */
+ menukey = getc();
# endif
- break;
+ break;
+ }
}
udelay(10000);
} while (!abort && get_timer(ts) < 1000);
--
2.25.1
meta-luxshare/meta-common/recipes-bsp/u-boot/files/0001-Read-mac-address-from-eeprom.patch
Executable
+380
View File
@@ -0,0 +1,380 @@
From 96a4361b92455982ea3e9c71aae436a65a7a6a3e Mon Sep 17 00:00:00 2001
From: "Zhao.Chen" <zhao.chen@luxshare-ict.com>
Date: 10 Sep 2024 14:37:07 +0000
Read the MAC address from EEPROM and set it to env.
Tested:
printenv
ethaddr=88:88:88:88:88:8b
eth1addr=88:88:88:88:88:8d
%% original patch: 0002-read-mac-address-from-eeprom.patch
---
board/aspeed/evb_ast2600/Kconfig | 5 +
board/aspeed/evb_ast2600/evb_ast2600.c | 79 ++++++++++
common/board_r.c | 3 +-
drivers/misc/Kconfig | 6 +
drivers/misc/Makefile | 1 +
drivers/misc/at24.c | 204 +++++++++++++++++++++++++
6 files changed, 297 insertions(+), 1 deletion(-)
create mode 100644 drivers/misc/at24.c
diff --git a/board/aspeed/evb_ast2600/Kconfig b/board/aspeed/evb_ast2600/Kconfig
index a5d105199f..839cd0e649 100644
--- a/board/aspeed/evb_ast2600/Kconfig
+++ b/board/aspeed/evb_ast2600/Kconfig
@@ -10,4 +10,9 @@ config SYS_CONFIG_NAME
string "board configuration name"
default "evb_ast2600"
+config MAC_ADDR_IN_EEPROM
+ bool "MAC address in EEPROM"
+ help
+ Enable this option to read the MAC from the EEPROM
+
endif
diff --git a/board/aspeed/evb_ast2600/evb_ast2600.c b/board/aspeed/evb_ast2600/evb_ast2600.c
index 72ecb18c15..7244686bb1 100644
--- a/board/aspeed/evb_ast2600/evb_ast2600.c
+++ b/board/aspeed/evb_ast2600/evb_ast2600.c
@@ -131,3 +131,82 @@ int board_early_init_f(void)
espi_init();
return 0;
}
+
+#if defined(CONFIG_MAC_ADDR_IN_EEPROM)
+
+#include <dm.h>
+#include <environment.h>
+#include <i2c_eeprom.h>
+
+#define MAC_NUM 2
+#define MAC_BYTE_SIZE 6
+
+static int get_ethaddr_from_eeprom(u8 *addr)
+{
+ struct udevice *dev;
+ u32 mac_offset[MAC_NUM];
+ int i, ret, mac_read;
+
+ uclass_first_device_check(UCLASS_I2C_EEPROM, &dev);
+ if (!dev) {
+ printf("No eeprom found.\n");
+ } else {
+ do {
+ if (dev_read_bool(dev, "ethaddr-in-eeprom")) {
+ char prop_mac_offset[32];
+ mac_read = 0;
+ for (i = 0; i < MAC_NUM; i++) {
+ snprintf(prop_mac_offset, 32, "eth%d-offset", i);
+ ret = dev_read_u32(dev, prop_mac_offset, &mac_offset[i]);
+ if (0 == ret) {
+ ret = i2c_eeprom_read(dev, mac_offset[i],
+ addr+i*MAC_BYTE_SIZE, MAC_BYTE_SIZE);
+ if (ret != 0) {
+ printf("get eth%d from eeprom failed, offset=0x%x\n",
+ i, mac_offset[i]);
+ return -1;
+ } else {
+ mac_read++;
+ }
+ }
+ }
+ if (mac_read > 0)
+ return 0;
+ }
+ uclass_next_device_check(&dev);
+ } while (dev);
+ }
+ return -1;
+}
+
+int mac_read_from_eeprom(void)
+{
+ u8 ethaddr[MAC_NUM*MAC_BYTE_SIZE];
+ char addr_str[100];
+
+ memset(ethaddr, 0, sizeof(ethaddr));
+
+ if (get_ethaddr_from_eeprom(ethaddr)) {
+ printf("get ethaddr from eeprom failed.\n");
+ return 0;
+ }
+ for (int i = 0; i < MAC_NUM; i++) {
+ if (is_valid_ethaddr(&ethaddr[MAC_BYTE_SIZE*i])) {
+ memset(addr_str, 0, sizeof(addr_str));
+ if (i == 0) {
+ snprintf(addr_str, sizeof(addr_str), "ethaddr");
+ } else {
+ snprintf(addr_str, sizeof(addr_str), "eth%daddr", i);
+ }
+ eth_env_set_enetaddr(addr_str, &ethaddr[MAC_BYTE_SIZE*i]);
+ env_save();
+ } else {
+ printf("eeprom mac%d address invaild:%pM\n", i, \
+ &ethaddr[MAC_BYTE_SIZE*i]);
+ }
+ }
+
+ return 0;
+}
+#endif
+
diff --git a/common/board_r.c b/common/board_r.c
index 429b9a2833..f1c98362ac 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -744,7 +744,8 @@ static init_fnc_t init_sequence_r[] = {
#endif
INIT_FUNC_WATCHDOG_RESET
initr_secondary_cpu,
-#if defined(CONFIG_ID_EEPROM) || defined(CONFIG_SYS_I2C_MAC_OFFSET)
+#if defined(CONFIG_ID_EEPROM) || defined(CONFIG_SYS_I2C_MAC_OFFSET) \
+ || defined(CONFIG_MAC_ADDR_IN_EEPROM)
mac_read_from_eeprom,
#endif
INIT_FUNC_WATCHDOG_RESET
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index c2a188ac29..69eeaf51fa 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -260,6 +260,12 @@ config SPL_I2C_EEPROM
This option is an SPL-variant of the I2C_EEPROM option.
See the help of I2C_EEPROM for details.
+config EEPROM_AT24
+ bool "Enable driver for AT24 EEPROMs"
+ depends on MISC
+ help
+ Enable a driver for AT24 EEPROMs attached via I2C.
+
config ZYNQ_GEM_I2C_MAC_OFFSET
hex "Set the I2C MAC offset"
default 0x0
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index bee53a3559..4e76c7d398 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o
obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o
obj-$(CONFIG_GDSYS_SOC) += gdsys_soc.o
obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o
+obj-$(CONFIG_$(SPL_)EEPROM_AT24) += at24.o
obj-$(CONFIG_IHS_FPGA) += ihs_fpga.o
obj-$(CONFIG_IMX8) += imx8/
obj-$(CONFIG_LED_STATUS) += status_led.o
diff --git a/drivers/misc/at24.c b/drivers/misc/at24.c
new file mode 100644
index 0000000000..e117098766
--- /dev/null
+++ b/drivers/misc/at24.c
@@ -0,0 +1,204 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2014 Google, Inc
+ */
+
+#include <common.h>
+#include <linux/err.h>
+#include <dm.h>
+#include <i2c.h>
+#include <i2c_eeprom.h>
+
+/* Address pointer is 16 bit. */
+#define AT24_FLAG_ADDR16 BIT(7)
+/* sysfs-entry will be read-only. */
+#define AT24_FLAG_READONLY BIT(6)
+/* sysfs-entry will be world-readable. */
+#define AT24_FLAG_IRUGO BIT(5)
+/* Take always 8 addresses (24c00). */
+#define AT24_FLAG_TAKE8ADDR BIT(4)
+/* Factory-programmed serial number. */
+#define AT24_FLAG_SERIAL BIT(3)
+/* Factory-programmed mac address. */
+#define AT24_FLAG_MAC BIT(2)
+/* Does not auto-rollover reads to the next slave address. */
+#define AT24_FLAG_NO_RDROL BIT(1)
+
+struct at24_chip_data {
+ struct udevice *dev;
+ u32 byte_len;
+ u8 flags;
+ void (*read_post)(unsigned int off, char *buf, size_t count);
+};
+
+#define AT24_CHIP_DATA(_name, _len, _flags) \
+ static const struct at24_chip_data _name = { \
+ .byte_len = _len, .flags = _flags, \
+ }
+
+AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, AT24_FLAG_NO_RDROL);
+AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, AT24_FLAG_NO_RDROL);
+AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16);
+AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16);
+
+int i2c_eeprom_read(struct udevice *dev, int offset, uint8_t *buf, int size)
+{
+ const struct i2c_eeprom_ops *ops = device_get_ops(dev);
+
+ if (!ops->read)
+ return -ENOSYS;
+
+ return ops->read(dev, offset, buf, size);
+}
+
+int i2c_eeprom_write(struct udevice *dev, int offset, uint8_t *buf, int size)
+{
+ const struct i2c_eeprom_ops *ops = device_get_ops(dev);
+
+ if (!ops->write)
+ return -ENOSYS;
+
+ return ops->write(dev, offset, buf, size);
+}
+
+/*
+ * This routine supports chips which consume multiple I2C addresses. It
+ * computes the addressing information to be used for a given r/w request.
+ * Assumes that sanity checks for offset happened at sysfs-layer.
+ *
+ * Slave address and byte offset derive from the offset. Always
+ * set the byte address; on a multi-master board, another master
+ * may have changed the chip's "current" address pointer.
+ */
+static unsigned int at24_translate_offset(struct at24_chip_data *at24,
+ unsigned int *offset)
+{
+ unsigned int i = 0;
+
+ if (at24->flags & AT24_FLAG_ADDR16) {
+ i = *offset >> 16;
+ *offset &= 0xffff;
+ } else {
+ i = *offset >> 8;
+ *offset &= 0xff;
+ }
+
+ return i;
+}
+
+static size_t at24_adjust_read_count(struct at24_chip_data *at24,
+ unsigned int offset, size_t count)
+{
+ unsigned int bits;
+ size_t remainder;
+
+ /*
+ * In case of multi-address chips that don't rollover reads to
+ * the next slave address: truncate the count to the slave boundary,
+ * so that the read never straddles slaves.
+ */
+ if (at24->flags & AT24_FLAG_NO_RDROL) {
+ bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8;
+ remainder = BIT(bits) - offset;
+ if (count > remainder)
+ count = remainder;
+ }
+
+ return count;
+}
+
+static ssize_t at24_read(struct at24_chip_data *at24, uint8_t *buf,
+ unsigned int offset, size_t count)
+{
+ int ret;
+ struct dm_i2c_chip *chip = dev_get_parent_platdata(at24->dev);
+ u8 chip_addr = chip->chip_addr;
+ int chip_addr_offset = at24_translate_offset(at24, &offset);
+
+ count = at24_adjust_read_count(at24, offset, count);
+ chip->chip_addr += chip_addr_offset;
+ ret = dm_i2c_read(at24->dev, offset, buf, count);
+ chip->chip_addr = chip_addr;
+
+ if (0 == ret) {
+ return count;
+ } else {
+ return -ETIMEDOUT;
+ }
+}
+
+static int i2c_eeprom_std_read(struct udevice *dev, int off, uint8_t *buf,
+ int size)
+{
+ struct at24_chip_data *at24;
+ int i, ret;
+
+ at24 = (struct at24_chip_data *)dev_get_driver_data(dev);
+
+ if (off + size > at24->byte_len)
+ return -EINVAL;
+
+ for (i = 0; size; i += ret, size -= ret) {
+ ret = at24_read(at24, buf + i, off + i, size);
+ if (ret < 0) {
+ return -ETIMEDOUT;
+ }
+ }
+
+ return 0;
+}
+
+static int i2c_eeprom_std_write(struct udevice *dev, int offset,
+ const uint8_t *buf, int size)
+{
+ return -ENODEV;
+}
+
+static const struct i2c_eeprom_ops i2c_eeprom_std_ops = {
+ .read = i2c_eeprom_std_read,
+ .write = i2c_eeprom_std_write,
+};
+
+static int i2c_eeprom_std_ofdata_to_platdata(struct udevice *dev)
+{
+ struct at24_chip_data *data;
+ struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
+
+ data = (struct at24_chip_data *)dev_get_driver_data(dev);
+ data->dev = dev;
+
+ if (data->flags & AT24_FLAG_ADDR16)
+ chip->offset_len = 2;
+ else
+ chip->offset_len = 1;
+
+ return 0;
+}
+
+static int i2c_eeprom_std_probe(struct udevice *dev)
+{
+ return 0;
+}
+
+static const struct udevice_id i2c_eeprom_std_ids[] = {
+ { .compatible = "atmel,24c08", .data = (ulong)&at24_data_24c08 },
+ { .compatible = "atmel,24c16", .data = (ulong)&at24_data_24c16 },
+ { .compatible = "atmel,24c32", .data = (ulong)&at24_data_24c32 },
+ { .compatible = "atmel,24c64", .data = (ulong)&at24_data_24c64 },
+ { /* END OF LIST */ },
+};
+
+U_BOOT_DRIVER(i2c_eeprom_std) = {
+ .name = "i2c_eeprom_at24",
+ .id = UCLASS_I2C_EEPROM,
+ .of_match = i2c_eeprom_std_ids,
+ .probe = i2c_eeprom_std_probe,
+ .ofdata_to_platdata = i2c_eeprom_std_ofdata_to_platdata,
+ .priv_auto_alloc_size = sizeof(struct i2c_eeprom),
+ .ops = &i2c_eeprom_std_ops,
+};
+
+UCLASS_DRIVER(i2c_eeprom) = {
+ .id = UCLASS_I2C_EEPROM,
+ .name = "i2c_eeprom_at24",
+};
--
2.35.3
meta-luxshare/meta-common/recipes-bsp/u-boot/files/0002-u-boot-Update-system-reset-event.patch
Executable
+110
View File
@@ -0,0 +1,110 @@
From 119df9b1a20361b1721dd72803caa9986af5e582 Mon Sep 17 00:00:00 2001
From: "Wang.Bin" <Bin-B.Wang@luxshare-ict.com>
Date: Fri, 25 Oct 2024 14:28:46 +0800
Subject: [PATCH 2/2] u boot Update system reset event Test:
/usr/sbin/fw_printenv system_reset_event=0xff31
---
arch/arm/mach-aspeed/ast2600/scu_info.c | 5 ++++-
board/aspeed/evb_ast2600/evb_ast2600.c | 11 +++++++++++
common/board_r.c | 3 +++
include/asm-generic/global_data.h | 3 +++
include/init.h | 4 ++++
5 files changed, 25 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-aspeed/ast2600/scu_info.c b/arch/arm/mach-aspeed/ast2600/scu_info.c
index a2277eec58..cf5cea3b12 100644
--- a/arch/arm/mach-aspeed/ast2600/scu_info.c
+++ b/arch/arm/mach-aspeed/ast2600/scu_info.c
@@ -9,6 +9,8 @@
#include <asm/io.h>
#include <asm/arch/aspeed_scu_info.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* SoC mapping Table */
#define SOC_ID(str, rev) { .name = str, .rev_id = rev, }
@@ -217,7 +219,8 @@ void aspeed_print_sysrst_info(void)
{
u32 rest = readl(ASPEED_SYS_RESET_CTRL);
u32 rest3 = readl(ASPEED_SYS_RESET_CTRL3);
-
+
+ gd->reset_reason = rest;
if (rest & SYS_PWR_RESET_FLAG) {
printf("RST: Power On \n");
writel(rest, ASPEED_SYS_RESET_CTRL);
diff --git a/board/aspeed/evb_ast2600/evb_ast2600.c b/board/aspeed/evb_ast2600/evb_ast2600.c
index 7244686bb1..668ae5c855 100644
--- a/board/aspeed/evb_ast2600/evb_ast2600.c
+++ b/board/aspeed/evb_ast2600/evb_ast2600.c
@@ -30,6 +30,8 @@
/* HICRB Bits */
#define HICRB_EN80HSGIO (1 << 13) /* Enable 80hSGIO */
+DECLARE_GLOBAL_DATA_PTR;
+
static void __maybe_unused port80h_snoop_init(void)
{
u32 value;
@@ -210,3 +212,12 @@ int mac_read_from_eeprom(void)
}
#endif
+int update_system_reset_event(void)
+{
+ char str_value[20];
+ memset(str_value, 0, sizeof(str_value));
+ snprintf(str_value, sizeof(str_value), "0x%x", gd->reset_reason);
+ env_set("system_reset_event", str_value);
+ env_save();
+ return 0;
+}
\ No newline at end of file
diff --git a/common/board_r.c b/common/board_r.c
index f1c98362ac..3ad64b881a 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -747,6 +747,9 @@ static init_fnc_t init_sequence_r[] = {
#if defined(CONFIG_ID_EEPROM) || defined(CONFIG_SYS_I2C_MAC_OFFSET) \
|| defined(CONFIG_MAC_ADDR_IN_EEPROM)
mac_read_from_eeprom,
+#endif
+#ifdef CONFIG_ASPEED_AST2600
+ update_system_reset_event,
#endif
INIT_FUNC_WATCHDOG_RESET
#if defined(CONFIG_PCI) && !defined(CONFIG_SYS_EARLY_PCI_INIT)
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 78dcf40bff..e81adabf1e 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -133,6 +133,9 @@ typedef struct global_data {
struct spl_handoff *spl_handoff;
# endif
#endif
+#ifdef CONFIG_ASPEED_AST2600
+ u32 reset_reason;
+#endif
} gd_t;
#endif
diff --git a/include/init.h b/include/init.h
index afc953d51e..009f591ea2 100644
--- a/include/init.h
+++ b/include/init.h
@@ -177,6 +177,10 @@ int misc_init_r(void);
int init_func_vid(void);
#endif
+#ifdef CONFIG_ASPEED_AST2600
+int update_system_reset_event(void);
+#endif
+
/* common/board_info.c */
int checkboard(void);
int show_board_info(void);
--
2.25.1
meta-luxshare/meta-common/recipes-bsp/u-boot/files/0003-Enable-FMC-WDT2.patch
Executable
+97
View File
@@ -0,0 +1,97 @@
From b3de8eb1967673d858fee96531698d8aab436a78 Mon Sep 17 00:00:00 2001
From: roly <Rolyli.Li@luxshare-ict.com>
Date: Wed, 27 Nov 2024 17:45:08 +0800
Subject: [PATCH] Enable FMC WDT2
---
board/aspeed/evb_ast2600/evb_ast2600.c | 42 ++++++++++++++++++++++++++
common/autoboot.c | 5 +++
2 files changed, 47 insertions(+)
diff --git a/board/aspeed/evb_ast2600/evb_ast2600.c b/board/aspeed/evb_ast2600/evb_ast2600.c
index 668ae5c855..dfb4c7c7ef 100644
--- a/board/aspeed/evb_ast2600/evb_ast2600.c
+++ b/board/aspeed/evb_ast2600/evb_ast2600.c
@@ -13,6 +13,11 @@
#define LPC_SNPWADR (LPC_BASE + 0x90)
#define LPC_HICRB (LPC_BASE + 0x100)
#define GPIO_BASE 0x1e780000
+#define FMC_BASE 0x1e620000
+#define FMC_WDT2_CTRL (FMC_BASE + 0x64)
+#define FMC_WDT2_TIMER_RELOAD_VALUE (FMC_BASE + 0x68)
+#define FMC_WDT2_TIMER_RESTART (FMC_BASE + 0x6c)
+#define WDT2_CTRL_ENABLE_WDT (1 << 0)
/* HICR5 Bits */
#define HICR5_EN_SIOGIO (1 << 31) /* Enable SIOGIO */
@@ -124,8 +129,37 @@ static void __maybe_unused espi_init(void)
writel(reg, ESPI_BASE + 0x000);
}
+static void __maybe_unused enable_fmc_wdt2(uint16_t expire_time)
+{
+ const u16 max_expire_time = 0x1fff;
+ const u16 timer_restart_cmd = 0x4755;
+ u32 reg;
+
+ if (expire_time > max_expire_time) {
+ expire_time = max_expire_time;
+ }
+
+ // The time unit is 0.1 second. The range is 0 to 0x1fff.
+ writel(expire_time, FMC_WDT2_TIMER_RELOAD_VALUE);
+ // Write 0x4755 value to load the reload value into watchdog counter
+ writel(timer_restart_cmd, FMC_WDT2_TIMER_RESTART);
+ // Enable FMC WDT2
+ reg = readl(FMC_WDT2_CTRL) | (WDT2_CTRL_ENABLE_WDT);
+ writel(reg, FMC_WDT2_CTRL);
+}
+
+void __maybe_unused disable_fmc_wdt2(void)
+{
+ u32 reg;
+
+ reg = readl(FMC_WDT2_CTRL) & ~(WDT2_CTRL_ENABLE_WDT);
+ writel(reg, FMC_WDT2_CTRL);
+}
+
int board_early_init_f(void)
{
+ disable_fmc_wdt2();
+ enable_fmc_wdt2(7800); // expire time: 13 minutes
#if 0
port80h_snoop_init();
sgpio_init();
@@ -220,4 +254,12 @@ int update_system_reset_event(void)
env_set("system_reset_event", str_value);
env_save();
return 0;
+}
+
+void board_preboot_os(void)
+{
+ const u16 expire_time = 780; // 13 minutes
+
+ enable_fmc_wdt2(expire_time * 10);
+ printf("Enable FMC WDT2: expire time is %d seconds.", expire_time);
}
\ No newline at end of file
diff --git a/common/autoboot.c b/common/autoboot.c
index 94133eaeda..d54f1c431f 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -267,6 +267,11 @@ static int abortboot(int bootdelay)
gd->flags &= ~GD_FLG_SILENT;
#endif
+#ifdef CONFIG_ASPEED_AST2600
+ if (abort)
+ disable_fmc_wdt2();
+#endif
+
return abort;
}
--
2.25.1
meta-luxshare/meta-common/recipes-bsp/u-boot/u-boot-aspeed-sdk_%.bbappend
Executable
+9
View File
@@ -0,0 +1,9 @@
FILESEXTRAPATHS:prepend := "${THISDIR}/files:"
SRC_URI:append = " \
file://0001-Read-mac-address-from-eeprom.patch \
file://0002-u-boot-Update-system-reset-event.patch \
file://0003-Enable-FMC-WDT2.patch \
file://0001-Force-set-mac-from-eeprom-even-if-current-mac-is-val.patch \
file://0001-Force-use-ctrl-l-to-entre-uboot-command-line.patch \
"