Initial commit
This commit is contained in:
Your Name
+235
@@ -0,0 +1,235 @@
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From 5a649c3dd0452eba0028c51546e2981e0b04de4f Mon Sep 17 00:00:00 2001
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From: Logananth Sundararaj <logananth_s@hcl.com>
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Date: Tue, 8 Mar 2022 19:18:27 +0530
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Subject: [PATCH] board-aspeed-Add-Mux-for-yosemitev2
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Signed-off-by: Logananth Sundararaj <logananth_s@hcl.com>
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---
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arch/arm/mach-aspeed/ast2500/platform.S | 191 ++++++++++++++++++++----
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1 file changed, 162 insertions(+), 29 deletions(-)
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diff --git a/arch/arm/mach-aspeed/ast2500/platform.S b/arch/arm/mach-aspeed/ast2500/platform.S
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index aef55c4a0a..137ed2c587 100644
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--- a/arch/arm/mach-aspeed/ast2500/platform.S
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+++ b/arch/arm/mach-aspeed/ast2500/platform.S
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@@ -302,6 +302,156 @@ TIME_TABLE_DDR4_1600:
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ldr r2, =0x00000800
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.endm
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+ .macro console_bmc
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+ ldr r0, =0x1e780024
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+ ldr r1, [r0]
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+ orr r1, r1, #0xF
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+ str r1, [r0]
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+
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+ ldr r0, =0x1e780020
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+ ldr r1, [r0]
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+ and r1, r1, #0xFFFFFFF0
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+ orr r1, r1, #0xC
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+ str r1, [r0]
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+ .endm
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+
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+.macro console_sel
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+
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+ // Disable SoL UARTs[1-4]
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+ ldr r0, =0x1e6e2080
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+ ldr r1, [r0]
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+ ldr r2, =0xBFBFFFFF
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+ and r1, r1, r2
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+ str r1, [r0]
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+
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+ ldr r0, =0x1e6e2084
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+ ldr r1, [r0]
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+ and r1, r1, r2
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+ str r1, [r0]
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+ // Enable GPIOE[0-3] Tolerant
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+ ldr r0, =0x1e78003c
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+ ldr r1, [r0]
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+ orr r1, r1, #0xF
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+ str r1, [r0]
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+
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+ // Read debug card present
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+ ldr r2, =0x1e780080
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+ ldr r0, [r2]
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+ and r0, r0, #0x00000800
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+ ldr r1, =0x0800
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+ cmp r0, r1
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+ bne dbg_card_pres\@
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+ console_bmc
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+ b case_end\@
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+
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+dbg_card_pres\@:
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+ // Read key position
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+ ldr r2, =0x1e7801e0
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+ ldr r0, [r2]
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+ bic r1, r0, #0xFF0FFFFF
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+ mov r0, r1, lsr #20
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+ //Test for position#1
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+ ldr r1, =0x00
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+ cmp r0, r1
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+ bne case_pos2\@
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+ console_bmc
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+ b case_end\@
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+case_pos2\@:
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+ //Test for position#2
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+ ldr r1, =0x01
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+ cmp r0, r1
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+ bne case_pos3\@
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+ console_bmc
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+ b case_end\@
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+case_pos3\@:
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+ //Test for position#3
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+ ldr r1, =0x02
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+ cmp r0, r1
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+ bne case_pos4\@
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+ console_bmc
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+ b case_end\@
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+case_pos4\@:
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+//Test for position#4
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+ ldr r1, =0x03
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+ cmp r0, r1
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+ bne case_pos5\@
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+ console_bmc
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+ b case_end\@
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+case_pos5\@:
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+ //Test for position#5
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+ ldr r1, =0x04
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+ cmp r0, r1
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+ bne case_pos6\@
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+ console_bmc
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+ b case_end\@
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+case_pos6\@:
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+ //Test for position#6
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+ ldr r1, =0x05
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+ cmp r0, r1
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+ bne case_pos7\@
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+ console_bmc
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+ b case_end\@
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+case_pos7\@:
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+ //Test for position#7
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+ ldr r1, =0x06
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+ cmp r0, r1
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+ bne case_pos8\@
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+ console_bmc
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+ b case_end\@
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+case_pos8\@:
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+ //Test for position#8
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+ ldr r1, =0x07
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+ cmp r0, r1
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+ bne case_pos9\@
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+ console_bmc
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+ b case_end\@
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+case_pos9\@:
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+ //Test for position#9
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+ ldr r1, =0x08
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+ cmp r0, r1
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+ bne case_pos10\@
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+ console_bmc
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+ b case_end\@
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+case_pos10\@:
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+ //Test for position#10
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+ ldr r1, =0x09
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+ cmp r0, r1
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+ bne case_end\@
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+ console_bmc
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+ b case_end\@
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+case_end\@:
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+.endm
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+
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+ .macro uart_console_setup
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+ console_sel
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+ /* setup UART console */
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+ ldr r0, =0x1E78400C
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+ mov r1, #0x83
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+ str r1, [r0]
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+
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+ ldr r0, =0x1e6e202c
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+ ldr r2, [r0]
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+ mov r2, r2, lsr #12
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+ tst r2, #0x01
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+ ldr r0, =0x1E784000
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+ moveq r1, #0x1A @ Baudrate 57600
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+ movne r1, #0x02 @ Baudrate 57600, div13
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+
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+ str r1, [r0]
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+
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+ ldr r0, =0x1E784004
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+ mov r1, #0x00
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+ str r1, [r0]
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+
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+ ldr r0, =0x1E78400C
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+ mov r1, #0x03
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+ str r1, [r0]
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+
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+ ldr r0, =0x1E784008
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+ mov r1, #0x07
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+ str r1, [r0]
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+ .endm
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+
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.macro print_hex_char
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and r1, r1, #0xF
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cmp r1, #9
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@@ -321,6 +471,16 @@ init_dram:
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/********************************************
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Initial Reset Procedure : Begin
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*******************************************/
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+ /* save into SRAM */
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+ ldr r0, =0x1e720200 /* vbs.uboot_exec_address */
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+ str r4, [r0]
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+
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+ uart_console_setup
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+
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+ ldr r0, =0x1E720204
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+ mov r1, #0x0
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+ str r1, [r0]
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+
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/* Clear AHB bus lock condition */
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ldr r0, =0x1e600000
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ldr r1, =0xAEED1A03
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@@ -794,6 +954,8 @@ wait_ddr_reset:
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clear_delay_timer
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/* end delay 10ms */
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+ uart_console_setup
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+
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/* Debug - UART console message */
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#ifdef CONFIG_DRAM_UART_TO_UART1
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ldr r0, =0x1e78909c @ route UART5 to UART Port1, 2016.08.29
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@@ -807,35 +969,6 @@ wait_ddr_reset:
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str r1, [r0]
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#endif
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- ldr r0, =0x1e78400c
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- mov r1, #0x83
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- str r1, [r0]
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-
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- ldr r0, =0x1e6e202c
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- ldr r2, [r0]
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- mov r2, r2, lsr #12
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- tst r2, #0x01
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- ldr r0, =0x1e784000
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- moveq r1, #0x0D @ Baudrate 115200
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- movne r1, #0x01 @ Baudrate 115200, div13
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-#ifdef CONFIG_DRAM_UART_38400
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- moveq r1, #0x27 @ Baudrate 38400
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- movne r1, #0x03 @ Baudrate 38400 , div13
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-#endif
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- str r1, [r0]
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-
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- ldr r0, =0x1e784004
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- mov r1, #0x00
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- str r1, [r0]
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-
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- ldr r0, =0x1e78400c
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- mov r1, #0x03
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- str r1, [r0]
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-
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- ldr r0, =0x1e784008
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- mov r1, #0x07
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- str r1, [r0]
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-
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ldr r0, =0x1e784000
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mov r1, #0x0D @ '\r'
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str r1, [r0]
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--
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2.17.1
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+185
@@ -0,0 +1,185 @@
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From 1fb38f86a77ec6656f87f427124a65dc6c0fdf5f Mon Sep 17 00:00:00 2001
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From: Logananth Sundararaj <logananth_s@hcl.com>
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Date: Tue, 8 Mar 2022 19:24:49 +0530
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Subject: [PATCH] spl-host-console-handle
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This patch adds four 1S server console through debug card
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connected to YosemiteV2 during boot.
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Handswitch in the adaptor card connected to AST2500 GPIOs as below,
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GPIOAA7 ---SW_ID8
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GPIOAA6 ---SW_ID4
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GPIOAA5 ---SW_ID2
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GPIOAA4 ---SW_ID1
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SW_ID8 SW_ID4 SW_ID2 SW_ID1 Position Descritpion
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L L L L 1 1s server slot1 select
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L L L H 2 1s server slot2 select
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L L H L 3 1s server slot3 select
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L L H H 4 1s server slot4 select
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L H L L 5 BMC Debug port select
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L H L H 6 1s server slot1 select
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L H H L 7 1s server slot2 select
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L H H H 8 1s server slot3 select
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H L L L 9 1s server slot4 select
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H L L H 10 BMC Debug port select
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BMC and Hosts UART control flow
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GPIOE0 --- DEBUG_UART_SEL_0
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GPIOE1 --- DEBUG_UART_SEL_1
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GPIOE2 --- DEBUG_UART_SEL_2
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GPIOE2 --- DEBUG_UART_RX_SEL_N
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SEL_2 SEL_1 SEL_0 RX_SEL_N CONSOLE
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0 0 0 0 SLOT1
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0 0 1 0 SLOT2
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0 1 0 0 SLOT3
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0 1 1 0 SLOT4
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1 0 0 1 BMC Debug
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Signed-off-by: Logananth Sundararaj <logananth_s@hcl.com>
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---
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arch/arm/mach-aspeed/ast2500/platform.S | 69 ++++++++++++++++++++++---
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1 file changed, 61 insertions(+), 8 deletions(-)
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diff --git a/arch/arm/mach-aspeed/ast2500/platform.S b/arch/arm/mach-aspeed/ast2500/platform.S
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index 137ed2c587..76a31c709a 100644
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--- a/arch/arm/mach-aspeed/ast2500/platform.S
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+++ b/arch/arm/mach-aspeed/ast2500/platform.S
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@@ -315,6 +315,59 @@ TIME_TABLE_DDR4_1600:
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str r1, [r0]
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.endm
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+ .macro console_slot1
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+ ldr r0, =0x1e780024
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+ ldr r1, [r0]
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+ orr r1, r1, #0xF
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+ str r1, [r0]
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+
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+ ldr r0, =0x1e780020
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+ ldr r1, [r0]
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+ and r1, r1, #0xFFFFFFF0
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+ orr r1, r1, #0x0
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+ str r1, [r0]
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+ .endm
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+
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+ .macro console_slot2
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+ ldr r0, =0x1e780024
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+ ldr r1, [r0]
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+ orr r1, r1, #0xF
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+ str r1, [r0]
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+
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+ ldr r0, =0x1e780020
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+ ldr r1, [r0]
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+ and r1, r1, #0xFFFFFFF0
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+ orr r1, r1, #0x1
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+ str r1, [r0]
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+ .endm
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+
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+ .macro console_slot3
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+ ldr r0, =0x1e780024
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+ ldr r1, [r0]
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+ orr r1, r1, #0xF
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+ str r1, [r0]
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+
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+ ldr r0, =0x1e780020
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+ ldr r1, [r0]
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+ and r1, r1, #0xFFFFFFF0
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+ orr r1, r1, #0x2
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+ str r1, [r0]
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+ .endm
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+
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+ .macro console_slot4
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+ ldr r0, =0x1e780024
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+ ldr r1, [r0]
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+ orr r1, r1, #0xF
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+ str r1, [r0]
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+
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+ ldr r0, =0x1e780020
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+ ldr r1, [r0]
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+ and r1, r1, #0xFFFFFFF0
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+ orr r1, r1, #0x3
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+ str r1, [r0]
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+ .endm
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+
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+
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.macro console_sel
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// Disable SoL UARTs[1-4]
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@@ -354,28 +407,28 @@ dbg_card_pres\@:
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ldr r1, =0x00
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cmp r0, r1
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bne case_pos2\@
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- console_bmc
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+ console_slot1
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b case_end\@
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case_pos2\@:
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//Test for position#2
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ldr r1, =0x01
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cmp r0, r1
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bne case_pos3\@
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- console_bmc
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+ console_slot2
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b case_end\@
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case_pos3\@:
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//Test for position#3
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ldr r1, =0x02
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cmp r0, r1
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bne case_pos4\@
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- console_bmc
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+ console_slot3
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b case_end\@
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case_pos4\@:
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//Test for position#4
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ldr r1, =0x03
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cmp r0, r1
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bne case_pos5\@
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- console_bmc
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+ console_slot4
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b case_end\@
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case_pos5\@:
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//Test for position#5
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@@ -389,28 +442,28 @@ case_pos6\@:
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ldr r1, =0x05
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cmp r0, r1
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bne case_pos7\@
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- console_bmc
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+ console_slot1
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b case_end\@
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case_pos7\@:
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//Test for position#7
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ldr r1, =0x06
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cmp r0, r1
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bne case_pos8\@
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- console_bmc
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+ console_slot2
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b case_end\@
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case_pos8\@:
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//Test for position#8
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ldr r1, =0x07
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cmp r0, r1
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bne case_pos9\@
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- console_bmc
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+ console_slot3
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b case_end\@
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case_pos9\@:
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//Test for position#9
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ldr r1, =0x08
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cmp r0, r1
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bne case_pos10\@
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- console_bmc
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+ console_slot4
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b case_end\@
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case_pos10\@:
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//Test for position#10
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--
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2.17.1
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@@ -0,0 +1,5 @@
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyS4,57600n8 root=/dev/ram rw"
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CONFIG_USE_BOOTCOMMAND=y
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CONFIG_BOOTCOMMAND="bootm 20080000"
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||||
CONFIG_BAUDRATE=57600
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@@ -0,0 +1,4 @@
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FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:"
|
||||
SRC_URI +="file://0001-board-aspeed-Add-Mux-for-yosemitev2.patch"
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||||
SRC_URI +="file://0002-spl-host-console-handle.patch"
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||||
SRC_URI +="file://yosemitev2.cfg"
|
||||
@@ -0,0 +1,2 @@
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||||
FILESEXTRAPATHS:prepend := "${THISDIR}/u-boot-aspeed-sdk:"
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||||
SRC_URI += "file://yosemitev2.cfg"
|
||||
Reference in New Issue
Block a user