Initial commit
This commit is contained in:
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@@ -0,0 +1,18 @@
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FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}/${MACHINE}:"
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SUMMARY = "AMD FPGA Register Dump Utility"
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DESCRIPTION = "AMD FPGA Register Dump Utility"
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LICENSE = "Apache-2.0"
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LIC_FILES_CHKSUM = "file://LICENSE;md5=5e24678b8d0883d9dfa9e9473069ddd2"
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RDEPENDS:${PN} = "bash"
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SRCREV = "${AUTOREV}"
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SRC_URI = "file://fpgardu.sh"
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SRC_URI += "file://LICENSE"
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S = "${WORKDIR}"
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do_install () {
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install -d ${D}${bindir}
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install -m 0755 ${S}/fpgardu.sh ${D}${bindir}/
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}
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@@ -0,0 +1,13 @@
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Full Description:
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Different components of meta-amd are under different licenses (a mix
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of MIT and Apache-2.0). Please see:
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COPYING.Apache-2.0
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COPYING.MIT (MIT)
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All metadata is MIT licensed unless otherwise stated. Source code
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included in tree for individual recipes is under the LICENSE stated in
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the associated recipe (.bb file) unless otherwise stated.
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License information for any other files is either explicitly stated
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or defaults to Apache-2.0.
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@@ -0,0 +1,277 @@
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#!/bin/bash
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echo
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echo "-----FPGA Daytona<x> CRB Register Dump Utility"
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echo
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I2CBUS=2
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FPGAADDR=0x41
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FPGA_REG=1
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DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
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echo ----------FPGAreg$FPGA_REG-------------------------
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echo M_ABCD_EVENT_R_BUF_N----- : $(((DATA & 0x80) >> 7))
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echo M_EFGH_EVENT_R_BUF_N----- : $(((DATA & 0x40) >> 6))
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echo M_IJKL_EVENT_R_BUF_N----- : $(((DATA & 0x20) >> 5))
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echo M_MNOP_EVENT_R_BUF_N----- : $(((DATA & 0x10) >> 4))
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FPGA_REG=2
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DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
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echo ----------FPGAreg$FPGA_REG-------------------------
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echo BMC_NVDIMM_PRSNT_R_N----- : $(((DATA & 0x80) >> 7))
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echo FM_ADR_TRIGGER_CPU_BUFF_N : $(((DATA & 0x40) >> 6))
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echo FM_BMC_ONCTL_N----------- : $(((DATA & 0x20) >> 5))
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echo FM_NVDIMM_EVENT_N-------- : $(((DATA & 0x10) >> 4))
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echo P0_FORCE_SELFREFRESH----- : $(((DATA & 0x08) >> 3))
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echo P0_NV_SAVE--------------- : $(((DATA & 0x04) >> 2))
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echo P1_FORCE_SELFREFRESH----- : $(((DATA & 0x02) >> 1))
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echo P1_NV_SAVE--------------- : $((DATA & 0x01))
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FPGA_REG=3
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DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
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echo ----------FPGAreg$FPGA_REG-------------------------
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echo CPLD_PWR_BTN_N----------- : $(((DATA & 0x80) >> 7))
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echo FM_DEBUG_RST_BTN_N------- : $(((DATA & 0x40) >> 6))
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echo P0_PWR_BTN_N------------- : $(((DATA & 0x20) >> 5))
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echo PWRBTN_CPLD_IN_N--------- : $(((DATA & 0x10) >> 4))
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echo FM_PLD_DEBUG_MODE_N------ : $(((DATA & 0x08) >> 3))
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echo FM_PLD_DEBUG0------------ : $(((DATA & 0x04) >> 2))
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echo FM_PLD_DEBUG1------------ : $(((DATA & 0x02) >> 1))
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echo FM_PLD_DEBUG0------------ : $((DATA & 0x01))
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FPGA_REG=4
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DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
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echo ----------FPGAreg$FPGA_REG-------------------------
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echo FM_PLD_DEBUG3------------ : $(((DATA & 0x80) >> 7))
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echo FM_PLD_DEBUG4------------ : $(((DATA & 0x40) >> 6))
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echo FM_PLD_DEBUG5------------ : $(((DATA & 0x20) >> 5))
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echo FM_PLD_DEBUG6------------ : $(((DATA & 0x10) >> 4))
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echo FM_PLD_DEBUG7------------ : $(((DATA & 0x08) >> 3))
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echo BP_SIG_CABLE_PRES_R_N---- : $(((DATA & 0x04) >> 2))
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echo CPLD_P0_THERMTRIP_N------ : $(((DATA & 0x02) >> 1))
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echo CPLD_P1_THERMTRIP_N------ : $((DATA & 0x01))
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FPGA_REG=5
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DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
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echo ----------FPGAreg$FPGA_REG-------------------------
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echo FM_BMC_CPLD_GPO---------- : $(((DATA & 0x80) >> 7))
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echo FM_BMC_READY_N----------- : $(((DATA & 0x40) >> 6))
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echo FM_CPLD_BMC_PWRDN_N------ : $(((DATA & 0x20) >> 5))
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echo LED_PWR_AMBER_R---------- : $(((DATA & 0x10) >> 4))
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echo LED_PWR_GRN_R------------ : $(((DATA & 0x08) >> 3))
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echo P0_CORETYPE-------------- : $(((DATA & 0x04) >> 2))
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echo P0_CPU_PRESENT_HDT------- : $(((DATA & 0x02) >> 1))
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echo P0_CPU_PRESENT_N--------- : $((DATA & 0x01))
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FPGA_REG=6
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DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
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echo ----------FPGAreg$FPGA_REG-------------------------
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echo P0_NMI_SYNC_FLOOD_N------ : $(((DATA & 0x80) >> 7))
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echo P0_PWROK_RST_BUF_EN_N---- : $(((DATA & 0x40) >> 6))
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echo P0_SP3R1----------------- : $(((DATA & 0x20) >> 5))
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echo P0_SP3R2_R--------------- : $(((DATA & 0x10) >> 4))
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echo P1_CORETYPE-------------- : $(((DATA & 0x08) >> 3))
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echo P1_CPU_PRESENT_HDT------- : $(((DATA & 0x04) >> 2))
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echo P1_CPU_PRESENT_N--------- : $(((DATA & 0x02) >> 1))
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echo P1_PWROK_RST_BUF_EN_N---- : $((DATA & 0x01))
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FPGA_REG=7
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DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
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echo ----------FPGAreg$FPGA_REG-------------------------
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echo P1_SP3R1----------------- : $(((DATA & 0x80) >> 7))
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echo P1_SP3R2_R--------------- : $(((DATA & 0x40) >> 6))
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echo PSU1_BLADE_EN_R_N-------- : $(((DATA & 0x20) >> 5))
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echo SLOT1_CLKREQ_N----------- : $(((DATA & 0x10) >> 4))
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echo SLOT1_PRSNT_N------------ : $(((DATA & 0x08) >> 3))
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echo SLOT2_CLKREQ_N----------- : $(((DATA & 0x04) >> 2))
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echo SLOT2_PRSNT_N------------ : $(((DATA & 0x02) >> 1))
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echo SMB_M2_S0_ALERT_N-------- : $((DATA & 0x01))
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FPGA_REG=8
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DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
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echo ----------FPGAreg$FPGA_REG-------------------------
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echo SMB_M2_S1_ALERT_N-------- : $(((DATA & 0x80) >> 7))
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echo FM_BMC_READ_SPD_TEMP----- : $(((DATA & 0x40) >> 6))
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echo PWR_ALL_ON_N------------- : $(((DATA & 0x20) >> 5))
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echo I2C_SELECT_CPLD---------- : $(((DATA & 0x10) >> 4))
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echo CPLD_PWRBRK_N------------ : $(((DATA & 0x08) >> 3))
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echo FM_PWRBRK_N-------------- : $(((DATA & 0x04) >> 2))
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echo PSU1_THROTTLE_N---------- : $(((DATA & 0x02) >> 1))
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echo PSU2_ALERT_EN_N---------- : $((DATA & 0x01))
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FPGA_REG=9
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DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
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echo ----------FPGAreg$FPGA_REG-------------------------
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echo PSU2_ALERT_N------------- : $(((DATA & 0x80) >> 7))
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echo RM_THROTTLE_EN_N----- ----: $(((DATA & 0x40) >> 6))
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echo FM_P1V8_AUX_P0_EN-------- : $(((DATA & 0x20) >> 5))
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echo FM_P1V8_AUX_P1_EN-------- : $(((DATA & 0x10) >> 4))
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echo FM_P1V8_P0_EN------------ : $(((DATA & 0x08) >> 3))
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echo FM_P1V8_P1_EN------------ : $(((DATA & 0x04) >> 2))
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echo FM_P5V_EN---------------- : $(((DATA & 0x02) >> 1))
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echo FM_PS_P12V_EN------------ : $((DATA & 0x01))
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FPGA_REG=10
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DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
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echo ----------FPGAreg$FPGA_REG-------------------------
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echo FM_PS_P12V_FAN_EN-------- : $(((DATA & 0x80) >> 7))
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echo FM_PVDDIO_ABCD_EN-------- : $(((DATA & 0x40) >> 6))
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echo FM_PVDDIO_EFGH_EN-------- : $(((DATA & 0x20) >> 5))
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echo FM_PVDDIO_IJKL_EN-------- : $(((DATA & 0x10) >> 4))
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echo FM_PVDDIO_MNOP_EN-------- : $(((DATA & 0x08) >> 3))
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echo FM_PVPP_ABCD_EN---------- : $(((DATA & 0x04) >> 2))
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echo FM_PVPP_EFGH_EN---------- : $(((DATA & 0x02) >> 1))
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echo FM_PVPP_IJKL_EN---------- : $((DATA & 0x01))
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FPGA_REG=11
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DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
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echo ----------FPGAreg$FPGA_REG-------------------------
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echo FM_PVPP_MNOP_EN---------- : $(((DATA & 0x80) >> 7))
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echo P0_VDDCR_CPU_EN1--------- : $(((DATA & 0x40) >> 6))
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echo P0_VDDCR_CPU_PWROK_R----- : $(((DATA & 0x20) >> 5))
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echo P0_VDDCR_SOC_AUX_EN------ : $(((DATA & 0x10) >> 4))
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echo P0_VDDCR_SOC_EN1--------- : $(((DATA & 0x08) >> 3))
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echo P0_VDDCR_SOC_PWROK_R----- : $(((DATA & 0x04) >> 2))
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echo P1_VDDCR_CPU_EN1--------- : $(((DATA & 0x02) >> 1))
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echo P1_VDDCR_CPU_PWROK_R----- : $((DATA & 0x01))
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FPGA_REG=12
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DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
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echo ----------FPGAreg$FPGA_REG-------------------------
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echo P1_VDDCR_SOC_AUX_EN------ : $(((DATA & 0x80) >> 7))
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echo P1_VDDCR_SOC_EN1--------- : $(((DATA & 0x40) >> 6))
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echo P1_VDDCR_SOC_PWROK_R----- : $(((DATA & 0x20) >> 5))
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echo PVTT_ABCD_EN------------- : $(((DATA & 0x10) >> 4))
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echo PVTT_EFGH_EN------------- : $(((DATA & 0x08) >> 3))
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echo PVTT_IJKL_EN------------- : $(((DATA & 0x04) >> 2))
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echo PVTT_MNOP_EN------------- : $(((DATA & 0x02) >> 1))
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echo VR_P3V3_EN_N------------- : $((DATA & 0x01))
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FPGA_REG=13
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DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
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echo ----------FPGAreg$FPGA_REG-------------------------
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echo ASSERT_P0_PWROK_L------- : $(((DATA & 0x80) >> 7))
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echo ASSERT_P1_PWROK_L------- : $(((DATA & 0x40) >> 6))
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echo HDT_HDR_PWROK----------- : $(((DATA & 0x20) >> 5))
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echo P0_33_PWROK------------- : $(((DATA & 0x10) >> 4))
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echo P0_PWR_GOOD------------- : $(((DATA & 0x08) >> 3))
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echo P0_PWRGD_OUT------------ : $(((DATA & 0x04) >> 2))
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echo P0_VDDCR_CPU_PG1-------- : $(((DATA & 0x02) >> 1))
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echo P0_VDDCR_SOC_PG1-------- : $((DATA & 0x01))
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FPGA_REG=14
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DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
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echo ----------FPGAreg$FPGA_REG-------------------------
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echo P1_33_PWROK------------- : $(((DATA & 0x80) >> 7))
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echo P1_PWR_GOOD------------- : $(((DATA & 0x40) >> 6))
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echo P1_PWRGD_OUT------------ : $(((DATA & 0x20) >> 5))
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echo P1_VDDCR_CPU_PG1-------- : $(((DATA & 0x10) >> 4))
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echo P1_VDDCR_SOC_PG1-------- : $(((DATA & 0x08) >> 3))
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echo P3V3_AUX_PWRGD---------- : $(((DATA & 0x04) >> 2))
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echo PWRGD_BMC_ALL----------- : $(((DATA & 0x02) >> 1))
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echo PWRGD_P0_VDDCR_SOC_AUX-- : $((DATA & 0x01))
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FPGA_REG=15
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DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
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echo ----------FPGAreg$FPGA_REG-------------------------
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echo PWRGD_P1_VDDCR_SOC_AUX-- : $(((DATA & 0x80) >> 7))
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echo PWRGD_P12V-------------- : $(((DATA & 0x40) >> 6))
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echo PWRGD_P12V_FAN_R-------- : $(((DATA & 0x20) >> 5))
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echo PWRGD_P1V8_AUX_P0------- : $(((DATA & 0x10) >> 4))
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echo PWRGD_P1V8_AUX_P1------- : $(((DATA & 0x08) >> 3))
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echo PWRGD_P1V8_P0----------- : $(((DATA & 0x04) >> 2))
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echo PWRGD_P1V8_P1----------- : $(((DATA & 0x02) >> 1))
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echo PWRGD_P3V3_R3----------- : $((DATA & 0x01))
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FPGA_REG=16
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DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
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echo ----------FPGAreg$FPGA_REG-------------------------
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echo PWRGD_P5V_CPLD_R-------- : $(((DATA & 0x80) >> 7))
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echo PWRGD_PVDDIO_ABCD------- : $(((DATA & 0x40) >> 6))
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echo PWRGD_PVDDIO_EFGH------- : $(((DATA & 0x20) >> 5))
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echo PWRGD_PVDDIO_IJKL------- : $(((DATA & 0x10) >> 4))
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echo PWRGD_PVDDIO_MNOP------- : $(((DATA & 0x08) >> 3))
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echo PWRGD_PVPP_ABCD--------- : $(((DATA & 0x04) >> 2))
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echo PWRGD_PVPP_EFGH--------- : $(((DATA & 0x02) >> 1))
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echo PWRGD_PVPP_IJKL--------- : $((DATA & 0x01))
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FPGA_REG=17
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DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
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echo ----------FPGAreg$FPGA_REG-------------------------
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echo PWRGD_PVPP_MNOP--------- : $(((DATA & 0x80) >> 7))
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echo PWRGD_PVTT_ABCD--------- : $(((DATA & 0x40) >> 6))
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echo PWRGD_PVTT_EFGH--------- : $(((DATA & 0x20) >> 5))
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echo PWRGD_PVTT_IJKL--------- : $(((DATA & 0x10) >> 4))
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echo PWRGD_PVTT_MNOP--------- : $(((DATA & 0x08) >> 3))
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echo PWRGD_SYS_BMC_PWROK----- : $(((DATA & 0x04) >> 2))
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echo P0_SLP_S3_N------------- : $(((DATA & 0x02) >> 1))
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echo P0_SLP_S5_N------------- : $((DATA & 0x01))
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FPGA_REG=18
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DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
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echo ----------FPGAreg$FPGA_REG-------------------------
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echo PSU2_PS_ON_N----------- : $(((DATA & 0x80) >> 7))
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echo BMC_PWRCAP_N----------- : $(((DATA & 0x40) >> 6))
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echo CPLD_FPH_ALERT_R_N----- : $(((DATA & 0x20) >> 5))
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echo FAST_PROCHOT_R_N------- : $(((DATA & 0x10) >> 4))
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echo FM_THROTTLE_IN_N------- : $(((DATA & 0x08) >> 3))
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echo HSC_GPIO0_PLD_N-------- : $(((DATA & 0x04) >> 2))
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echo HSC_GPIO1_PLD_N-------- : $(((DATA & 0x02) >> 1))
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echo P0_BMC_PROCHOT_N------- : $((DATA & 0x01))
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FPGA_REG=19
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DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
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echo ----------FPGAreg$FPGA_REG-------------------------
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echo P1_BMC_PROCHOT_N------- : $(((DATA & 0x80) >> 7))
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echo PMB_ALERT_SW_N--------- : $(((DATA & 0x40) >> 6))
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echo RM_THROTTLE_SW_N------- : $(((DATA & 0x20) >> 5))
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echo RST_PLTRST_DLY--------- : $(((DATA & 0x10) >> 4))
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echo UV_ALERT_R_N----------- : $(((DATA & 0x08) >> 3))
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echo ASSERT_P0_RESET-------- : $(((DATA & 0x04) >> 2))
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echo ASSERT_P1_RESET-------- : $(((DATA & 0x02) >> 1))
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echo HDT_HDR_RESET_L-------- : $((DATA & 0x01))
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FPGA_REG=20
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DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
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echo ----------FPGAreg$FPGA_REG-------------------------
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echo RST_CPLD_BMC_R_N------- : $(((DATA & 0x80) >> 7))
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echo RST_CPU_1V8_N---------- : $(((DATA & 0x40) >> 6))
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echo RST_KBRST_P0_N--------- : $(((DATA & 0x20) >> 5))
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echo RST_P0_3V3_N----------- : $(((DATA & 0x10) >> 4))
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echo RST_P0_PE0_N----------- : $(((DATA & 0x08) >> 3))
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echo RST_P0_PE1_N----------- : $(((DATA & 0x04) >> 2))
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echo RST_P0_PE2_N----------- : $(((DATA & 0x02) >> 1))
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echo RST_P0_PE3_N,---------- : $((DATA & 0x01))
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FPGA_REG=21
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DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
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echo ----------FPGAreg$FPGA_REG-------------------------
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echo RST_P0_SASHD_0_R_N----- : $(((DATA & 0x80) >> 7))
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echo RST_P0_SASHD_1_R_N----- : $(((DATA & 0x40) >> 6))
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echo RST_P1_3V3_N----------- : $(((DATA & 0x20) >> 5))
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echo RST_P1_OCU1_R_N-------- : $(((DATA & 0x10) >> 4))
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echo RST_P1_PE0_N----------- : $(((DATA & 0x08) >> 3))
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echo RST_P1_PE1_N----------- : $(((DATA & 0x04) >> 2))
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echo RST_P1_PE2_N----------- : $(((DATA & 0x02) >> 1))
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echo RST_P1_PE3_N,---------- : $((DATA & 0x01))
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||||
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FPGA_REG=22
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DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
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echo ----------FPGAreg$FPGA_REG-------------------------
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||||
echo RST_BMC_RSTBTN_OUT_N_CPLD : $(((DATA & 0x80) >> 7))
|
||||
echo RST_PE_NVME0_N----------- : $(((DATA & 0x40) >> 6))
|
||||
echo RST_PE_NVME1_N----------- : $(((DATA & 0x20) >> 5))
|
||||
echo RST_PE_NVME2_N----------- : $(((DATA & 0x10) >> 4))
|
||||
echo RST_PE_NVME3_N----------- : $(((DATA & 0x08) >> 3))
|
||||
echo RST_PE_SLOT1_N----------- : $(((DATA & 0x04) >> 2))
|
||||
echo RST_PE_SLOT2_N----------- : $(((DATA & 0x02) >> 1))
|
||||
echo RST_PE_SLOT3_N----------- : $((DATA & 0x01))
|
||||
|
||||
FPGA_REG=23
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf '0x%x' $FPGA_REG)")
|
||||
echo ----------FPGAreg$FPGA_REG-------------------------
|
||||
echo RST_PE_SLOT4_N----------- : $(((DATA & 0x80) >> 7))
|
||||
echo RST_PE_SLOT5_N----------- : $(((DATA & 0x40) >> 6))
|
||||
echo RST_RSMRST_P0_N---------- : $(((DATA & 0x20) >> 5))
|
||||
echo RST_RSMRST_P1_N---------- : $(((DATA & 0x10) >> 4))
|
||||
echo RST_SYSTEM_BTN_CPLD_N---- : $(((DATA & 0x08) >> 3))
|
||||
echo RST_VSBPWR_BMC_BUF_N----- : $(((DATA & 0x04) >> 2))
|
||||
@@ -0,0 +1,398 @@
|
||||
#!/bin/bash
|
||||
echo
|
||||
echo "-----FPGA Ethanol<x> CRB Register Dump Utility"
|
||||
echo
|
||||
I2CBUS=2
|
||||
FPGAADDR=0x50
|
||||
|
||||
# FPGA FW Version Information
|
||||
FPGA_REG=39
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
MAJOR=$((DATA >> 4))
|
||||
MINOR=$((DATA & 0x0F))
|
||||
echo FPGA FW Version: $MAJOR.$MINOR
|
||||
|
||||
# IP register information
|
||||
FPGA_REG=0
|
||||
IP_REG_MAX=3
|
||||
printf "IP Address Registers: "
|
||||
while [ $FPGA_REG -le $IP_REG_MAX ]
|
||||
do
|
||||
# not using printf as integer and hex values are the same for this use
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR $FPGA_REG)
|
||||
if [ $FPGA_REG -ne $IP_REG_MAX ] ; then
|
||||
printf "%d." "$DATA"
|
||||
else
|
||||
printf "%d\n\n" "$DATA"
|
||||
fi
|
||||
((FPGA_REG=FPGA_REG+1))
|
||||
done
|
||||
|
||||
# VDD block - Addresses 16 - 23
|
||||
FPGA_REG=16
|
||||
VDD_REG_MAX=23
|
||||
SOCKET=0
|
||||
|
||||
while [ $FPGA_REG -le $VDD_REG_MAX ]
|
||||
do
|
||||
VDD_LOOP_CNT=0
|
||||
|
||||
while [ $VDD_LOOP_CNT -le 1 ]
|
||||
do
|
||||
if [ $VDD_LOOP_CNT -eq 0 ] ; then
|
||||
VDD_LOOP_CNT_TXT="Enables"
|
||||
else
|
||||
VDD_LOOP_CNT_TXT="Power Goods"
|
||||
fi
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
echo ----------FPGAreg$FPGA_REG-----P$SOCKET VDD "$VDD_LOOP_CNT_TXT"
|
||||
echo VDD_18_DUAL : $((DATA & 0x01))
|
||||
echo VDD_SOC_DUAL: $(((DATA & 0x02) >> 1))
|
||||
echo VDD_SPD_ABCD: $(((DATA & 0x04) >> 2))
|
||||
echo VDD_VPP_ABCD: $(((DATA & 0x08) >> 3))
|
||||
echo VDD_VTT_ABCD: $(((DATA & 0x10) >> 4))
|
||||
echo VDD_MEM_ABCD: $(((DATA & 0x20) >> 5))
|
||||
echo VDD_SPD_EFGH: $(((DATA & 0x40) >> 6))
|
||||
echo VDD_VPP_EFGH: $(((DATA & 0x80) >> 7))
|
||||
|
||||
((FPGA_REG=FPGA_REG+1))
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
echo VDD_VTT_EFGH : $((DATA & 0x01))
|
||||
echo VDD_MEM_EFGH : $(((DATA & 0x02) >> 1))
|
||||
echo VDD_18_RUN-- : $(((DATA & 0x04) >> 2))
|
||||
echo VDD_SOC_RUN- : $(((DATA & 0x08) >> 3))
|
||||
echo VDD_CORE_RUN : $(((DATA & 0x10) >> 4))
|
||||
((FPGA_REG=FPGA_REG+1))
|
||||
((VDD_LOOP_CNT=VDD_LOOP_CNT+1))
|
||||
done
|
||||
((SOCKET=SOCKET+1))
|
||||
done
|
||||
|
||||
# Power State/Reset Data
|
||||
FPGA_REG=24
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
echo ----------FPGAreg$FPGA_REG-----Power state Information:
|
||||
echo P0_SLP_S5_L--- : $((DATA & 0x01))
|
||||
echo P0_SLP_S3_L--- : $(((DATA & 0x02) >> 1))
|
||||
echo ATX_PS_ON----- : $(((DATA & 0x04) >> 2))
|
||||
echo FPGA_5_DUAL_EN : $(((DATA & 0x08) >> 3))
|
||||
|
||||
# Power Good information
|
||||
FPGA_REG=25
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
echo ----------FPGAreg$FPGA_REG-----Power Good Information:
|
||||
echo VDD_33_DUAL_PG------- : $((DATA & 0x01))
|
||||
echo FPGA_VDD_CORE_DUAL_PG : $(((DATA & 0x02) >> 1))
|
||||
echo MGMT_VDD_VPP_DUAL_PG- : $(((DATA & 0x04) >> 2))
|
||||
echo MGMT_VDD_MEM_DUAL_PG- : $(((DATA & 0x08) >> 3))
|
||||
echo MGMT_VDD_CORE_DUAL_PG : $(((DATA & 0x10) >> 4))
|
||||
echo ATX_PWR_OK----------- : $(((DATA & 0x20) >> 5))
|
||||
|
||||
# Power and Reset Signals
|
||||
FPGA_REG=26
|
||||
PWRRST_REG_MAX=27
|
||||
SOCKET=0
|
||||
while [ $FPGA_REG -le $PWRRST_REG_MAX ]
|
||||
do
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
echo ----------FPGAreg$FPGA_REG-----P$SOCKET Power and Reset Signals:
|
||||
echo RSMRST_L----------------- : $((DATA & 0x01))
|
||||
echo PWR_GOOD----------------- : $(((DATA & 0x02) >> 1))
|
||||
echo PWRGD_OUT---------------- : $(((DATA & 0x04) >> 2))
|
||||
echo FPGA_PWROK_RESET_BUF_EN_L : $(((DATA & 0x08) >> 3))
|
||||
echo 33_PWROK----------------- : $(((DATA & 0x10) >> 4))
|
||||
echo VDD_CORE_RUN_PWROK------- : $(((DATA & 0x20) >> 5))
|
||||
echo VDD_SOC_RUN_PWROK-------- : $(((DATA & 0x40) >> 6))
|
||||
echo 33_RESET_L--------------- : $(((DATA & 0x80) >> 7))
|
||||
((FPGA_REG=FPGA_REG+1))
|
||||
done
|
||||
|
||||
# Processor and power cable preset signals
|
||||
FPGA_REG=28
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
echo ----------FPGAreg$FPGA_REG-----Processor and power cable preset signals:
|
||||
echo P0_PRESENT_L--------------------- : $((DATA & 0x01))
|
||||
echo P0_VDD_MEM_ABCD_12_RUN_PLUG_PRSNT : $(((DATA & 0x02) >> 1))
|
||||
echo P0_VDD_MEM_EFGH_12_RUN_PLUG_PRSNT : $(((DATA & 0x04) >> 2))
|
||||
echo P0_VDD_12_RUN_PLUG_PRSNT--------- : $(((DATA & 0x08) >> 3))
|
||||
echo P1_PRESENT_L--------------------- : $(((DATA & 0x10) >> 4))
|
||||
echo P1_VDD_MEM_ABCD_12_RUN_PLUG_PRSNT : $(((DATA & 0x20) >> 5))
|
||||
echo P1_VDD_MEM_EFGH_12_RUN_PLUG_PRSNT : $(((DATA & 0x40) >> 6))
|
||||
echo P1_VDD_12_RUN_PLUG_PRSNT--------- : $(((DATA & 0x80) >> 7))
|
||||
|
||||
# Board LEDs
|
||||
FPGA_REG=29
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
echo ----------FPGAreg$FPGA_REG-----LED States:
|
||||
echo PWR_GOOD_LED--- : $((DATA & 0x01))
|
||||
echo PWROK_LED------ : $(((DATA & 0x02) >> 1))
|
||||
echo RESET_LED_L---- : $(((DATA & 0x04) >> 2))
|
||||
echo P0_PROCHOT_LED- : $(((DATA & 0x08) >> 3))
|
||||
echo P1_PROCHOT_LED- : $(((DATA & 0x10) >> 4))
|
||||
|
||||
# VR thermal errors
|
||||
FPGA_REG=30
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
echo ----------FPGAreg$FPGA_REG-----VR Thermal Errors:
|
||||
echo P0_VDD_MEM_ABCD_SUS_VRHOT_L : $((DATA & 0x01))
|
||||
echo P0_VDD_MEM_EFGH_SUS_VRHOT_L : $(((DATA & 0x02) >> 1))
|
||||
echo P0_VDD_SOC_RUN_VRHOT_L----- : $(((DATA & 0x04) >> 2))
|
||||
echo P0_VDD_CORE_RUN_VRHOT_L---- : $(((DATA & 0x08) >> 3))
|
||||
echo P1_VDD_MEM_ABCD_SUS_VRHOT_L : $(((DATA & 0x10) >> 4))
|
||||
echo P1_VDD_MEM_EFGH_SUS_VRHOT_L : $(((DATA & 0x20) >> 5))
|
||||
echo P1_VDD_SOC_RUN_VRHOT_L----- : $(((DATA & 0x40) >> 6))
|
||||
echo P1_VDD_CORE_RUN_VRHOT_L---- : $(((DATA & 0x80) >> 7))
|
||||
|
||||
# Processor and board Thermal Errors
|
||||
FPGA_REG=31
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
echo ----------FPGAreg$FPGA_REG-----Processor and board Thermal Errors:
|
||||
echo FPGA_P0_THERMTRIP_L : $((DATA & 0x01))
|
||||
echo FPGA_P1_THERMTRIP_L : $(((DATA & 0x02) >> 1))
|
||||
echo SENSOR_THERM_L----- : $(((DATA & 0x04) >> 2))
|
||||
echo P0_PROCHOT_L------- : $(((DATA & 0x08) >> 3))
|
||||
echo P1_PROCHOT_L------- : $(((DATA & 0x10) >> 4))
|
||||
|
||||
# AST2500 control Signals
|
||||
FPGA_REG=32
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
echo ----------FPGAreg$FPGA_REG-----AST2500 Control Signals:
|
||||
echo MGMT_ASSERT_BMC_READY--- : $((DATA & 0x01))
|
||||
echo MGMT_ASSERT_LOCAL_LOCK-- : $(((DATA & 0x02) >> 1))
|
||||
echo MGMT_ASSERT_PWR_BTN----- : $(((DATA & 0x04) >> 2))
|
||||
echo MGMT_ASSERT_RST_BTN----- : $(((DATA & 0x08) >> 3))
|
||||
echo MGMT_ASSERT_NMI_BTN----- : $(((DATA & 0x10) >> 4))
|
||||
echo MGMT_ASSERT_P0_PROCHOT-- : $(((DATA & 0x20) >> 5))
|
||||
echo MGMT_ASSERT_P1_PROCHOT-- : $(((DATA & 0x40) >> 6))
|
||||
echo MGMT_ASSERT_WARM_RST_BTN : $(((DATA & 0x80) >> 7))
|
||||
|
||||
# FPGA processor control signals
|
||||
FPGA_REG=33
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
echo ----------FPGAreg$FPGA_REG-----FPGA processor Control Signals:
|
||||
echo ASSERT_P0_PWROK_L-------- : $((DATA & 0x01))
|
||||
echo ASSERT_P0_RESET_L-------- : $(((DATA & 0x02) >> 1))
|
||||
echo ASSERT_P0_PROCHOT_L------ : $(((DATA & 0x04) >> 2))
|
||||
echo MGMT_SYS_MON_P0_PROCHOT_L : $(((DATA & 0x08) >> 3))
|
||||
echo ASSERT_P1_PWROK_L-------- : $(((DATA & 0x10) >> 4))
|
||||
echo ASSERT_P1_RESET_L-------- : $(((DATA & 0x20) >> 5))
|
||||
echo ASSERT_P1_PROCHOT_L------ : $(((DATA & 0x40) >> 6))
|
||||
echo MGMT_SYS_MON_P1_PROCHOT_L : $(((DATA & 0x80) >> 7))
|
||||
|
||||
# Buttons/Resets
|
||||
FPGA_REG=34
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
echo ----------FPGAreg$FPGA_REG-----Button and Reset Signals:
|
||||
echo PWR_BTN_L----- : $((DATA & 0x01))
|
||||
echo RST_BTN_L----- : $(((DATA & 0x02) >> 1))
|
||||
echo WARM_RST_BTN_L : $(((DATA & 0x04) >> 2))
|
||||
echo NMI_BTN_L----- : $(((DATA & 0x08) >> 3))
|
||||
echo FPGA_BTN_L---- : $(((DATA & 0x10) >> 4))
|
||||
echo P0_PWR_BTN_L-- : $(((DATA & 0x20) >> 5))
|
||||
echo P0_SYS_RESET_L : $(((DATA & 0x40) >> 6))
|
||||
echo P0_KBRST_L---- : $(((DATA & 0x80) >> 7))
|
||||
|
||||
# Miscellaneous Block 1
|
||||
FPGA_REG=35
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
echo ----------FPGAreg$FPGA_REG-----Miscellaneous 35 Signals:
|
||||
echo MGMT_AC_LOSS_L---------- : $((DATA & 0x01))
|
||||
echo P0_NV_FORCE_SELF_REFRESH : $(((DATA & 0x02) >> 1))
|
||||
echo P1_NV_FORCE_SELF_REFRESH : $(((DATA & 0x04) >> 2))
|
||||
echo P0_LOCAL_SPI_ROM_SEL_L-- : $(((DATA & 0x08) >> 3))
|
||||
echo PCIE_SLOT4_HP_FON_L----- : $(((DATA & 0x10) >> 4))
|
||||
echo P0_NMI_SYNC_FLOOD_L----- : $(((DATA & 0x20) >> 5))
|
||||
echo FPGA_LPC_RST_L---------- : $(((DATA & 0x40) >> 6))
|
||||
echo MGMT_SMBUS_ALERT_L------ : $(((DATA & 0x80) >> 7))
|
||||
|
||||
# Miscellaneous Block 2
|
||||
FPGA_REG=36
|
||||
SHUTDOWNERR=0
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
echo ----------FPGAreg$FPGA_REG-----Miscellaneous 36 Signals:
|
||||
echo physical_pg------------------- : $((DATA & 0x01))
|
||||
echo shutdown_error---------------- : $(((DATA & 0x02) >> 1))
|
||||
SHUTDOWNERR=$(((DATA & 0x02) >> 1))
|
||||
echo P0_PRESENT_HDT---------------- : $(((DATA & 0x04) >> 2))
|
||||
echo P1_PRESENT_HDT---------------- : $(((DATA & 0x08) >> 3))
|
||||
echo DAP_EXT_P0_CORE_RUN_VOLTAGE_PG : $(((DATA & 0x10) >> 4))
|
||||
echo FPGA_BRD_ID------------------- : $(((DATA & 0x20) >> 5))
|
||||
echo FPGA_BRD_ID------------------- : $(((DATA & 0x40) >> 6))
|
||||
echo MGMT_FPGA_RSVD---------------- : $(((DATA & 0x80) >> 7))
|
||||
|
||||
# Switch S1
|
||||
FPGA_REG=37
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
echo ----------FPGAreg$FPGA_REG-----Switch Bank S1:
|
||||
if [ $((DATA & 0x01)) -eq 1 ] ; then
|
||||
echo "FPGA_SW1-1 - OFF - P0 PwrReg PU with Proc"
|
||||
else
|
||||
echo "FPGA_SW1-1 - ON - P0 PwrReg PU without Proc"
|
||||
fi
|
||||
if [ $(((DATA & 0x02) >> 1)) -eq 1 ] ; then
|
||||
echo "FPGA_SW1-1 - OFF - P1 PwrReg PU with Proc"
|
||||
else
|
||||
echo "FPGA_SW1-1 - ON - P1 PwrReg PU without Proc"
|
||||
fi
|
||||
if [ $(((DATA & 0x04) >> 2)) -eq 1 ] ; then
|
||||
echo "FPGA_SW1-3 - OFF - ATX Connectors Valid"
|
||||
else
|
||||
echo "FPGA_SW1-3 - ON - ATX Connectors Ignored"
|
||||
fi
|
||||
if [ $(((DATA & 0x08) >> 3)) -eq 1 ] ; then
|
||||
echo "FPGA_SW1-4 - OFF - Wait for BMC Boot"
|
||||
else
|
||||
echo "FPGA_SW1-4 - ON - Do Not Wait for BMC Boot"
|
||||
fi
|
||||
if [ $(((DATA & 0x10) >> 4)) -eq 1 ] ; then
|
||||
echo "FPGA_SW1-5 - OFF - MemPwrReg PU after ATX"
|
||||
else
|
||||
echo "FPGA_SW1-5 - ON - MemPwrReg PU before ATX"
|
||||
fi
|
||||
if [ $(((DATA & 0x20) >> 5)) -eq 1 ] ; then
|
||||
echo "FPGA_SW1-6 - OFF - DAP CORE Reg Bypass DISABLED"
|
||||
else
|
||||
echo "FPGA_SW1-6 - ON - DAP CORE Reg Bypass ENABLED"
|
||||
fi
|
||||
if [ $(((DATA & 0x40) >> 6)) -eq 1 ] ; then
|
||||
echo "FPGA_SW1-7 - OFF - Bypass P0 in HDT JTAG Chain DISABLED"
|
||||
else
|
||||
echo "FPGA_SW1-7 - ON - Bypass P0 in HDT JTAG Chain ENABLED"
|
||||
fi
|
||||
if [ $(((DATA & 0x80) >> 7)) -eq 1 ] ; then
|
||||
echo "FPGA_SW1-8 - OFF - Bypass P1 in HDT JTAG Chain DISABLED"
|
||||
else
|
||||
echo "FPGA_SW1-8 - ON - Bypass P1 in HDT JTAG Chain ENABLED"
|
||||
fi
|
||||
|
||||
# Switch S2
|
||||
FPGA_REG=38
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
echo ----------FPGAreg$FPGA_REG-----Switch Bank S2:
|
||||
if [ $((DATA & 0x01)) -eq 1 ] ; then
|
||||
echo "FPGA_SW2-1 - OFF - Boot from SPI ROM behind BMC"
|
||||
else
|
||||
echo "FPGA_SW2-1 - ON - Boot from P0 local SPI ROM"
|
||||
fi
|
||||
if [ $(((DATA & 0x02) >> 1)) -eq 1 ] ; then
|
||||
echo "FPGA_SW2-2 - OFF - PCIe SLOT4 hot plug forced PwrON without driver"
|
||||
else
|
||||
echo "FPGA_SW2-2 - ON - PCIe SLOT4 hot plug NOT forced PwrON without driver"
|
||||
fi
|
||||
if [ $(((DATA & 0x04) >> 2)) -eq 1 ] ; then
|
||||
echo "FPGA_SW2-3 - OFF - SMI testing DISABLED"
|
||||
else
|
||||
echo "FPGA_SW2-3 - ON - SMI testing ENABLED"
|
||||
fi
|
||||
if [ $(((DATA & 0x08) >> 3)) -eq 1 ] ; then
|
||||
echo "FPGA_SW2-4 - OFF - PROCHOT testing DISABLED"
|
||||
else
|
||||
echo "FPGA_SW2-4 - ON - PROCHOT testing ENABLED"
|
||||
fi
|
||||
if [ $(((DATA & 0x10) >> 4)) -eq 1 ] ; then
|
||||
echo "FPGA_SW2-5 - OFF - PwrCycle on post code C0 DISABLED"
|
||||
else
|
||||
echo "FPGA_SW2-5 - ON - PwrCycle on post code C0 ENABLED"
|
||||
fi
|
||||
if [ $(((DATA & 0x20) >> 5)) -eq 1 ] ; then
|
||||
echo "FPGA_SW2-6 - OFF - PwrCycle Px DISABLED"
|
||||
else
|
||||
echo "FPGA_SW2-6 - ON - PwrCycle - Px Present - RESET_L | Px Not Present VR PwrGood"
|
||||
fi
|
||||
if [ $(((DATA & 0x40) >> 6)) -eq 1 ] ; then
|
||||
echo "FPGA_SW2-7 - OFF - BMC IP Address display DISABLED"
|
||||
else
|
||||
echo "FPGA_SW2-7 - ON - BMC IP Address display ENABLED"
|
||||
fi
|
||||
if [ $(((DATA & 0x80) >> 7)) -eq 1 ] ; then
|
||||
echo "FPGA_SW1-8 - OFF - FORCE_SELFREFRESH support diabled"
|
||||
else
|
||||
echo "FPGA_SW1-8 - ON - FORCE_SELFREFRESH support diabled"
|
||||
fi
|
||||
|
||||
# Powerup Error Group
|
||||
echo ------------------------Power and Thermal Error Group
|
||||
if [ $SHUTDOWNERR = 0 ] ; then
|
||||
echo NO Shutdown Errors Detected
|
||||
fi
|
||||
|
||||
FPGA_REG=40
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
if [ $((DATA & 0x0F)) != 0 ] ; then
|
||||
echo PU Error: PU1$((DATA & 0x0F))
|
||||
echo "$DATA"
|
||||
fi
|
||||
|
||||
FPGA_REG=41
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
if [ $((DATA & 0x07)) != 0 ] ; then
|
||||
echo PU Error: PU2$((DATA & 0x07))
|
||||
fi
|
||||
|
||||
FPGA_REG=42
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
if [ $((DATA & 0x0F)) != 0 ] ; then
|
||||
echo PU Error: PU1$((DATA & 0x0F))
|
||||
fi
|
||||
|
||||
FPGA_REG=43
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
if [ $((DATA & 0x07)) != 0 ] ; then
|
||||
echo PU Error: PU4$((DATA & 0x07))
|
||||
fi
|
||||
|
||||
FPGA_REG=44
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
if [ $((DATA & 0x03)) != 0 ] ; then
|
||||
echo PU Error: PU5$((DATA & 0x03))
|
||||
fi
|
||||
|
||||
FPGA_REG=45
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
if [ $((DATA & 0x07)) != 0 ] ; then
|
||||
echo PU Error: PU6$((DATA & 0x07))
|
||||
fi
|
||||
|
||||
# Powerdown Error Group
|
||||
FPGA_REG=46
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
if [ $((DATA & 0x0F)) != 0 ] ; then
|
||||
echo PD Error: PD1$((DATA & 0x0F))
|
||||
fi
|
||||
|
||||
FPGA_REG=47
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
if [ $((DATA & 0x07)) != 0 ] ; then
|
||||
echo PD Error: PD2$((DATA & 0x07))
|
||||
fi
|
||||
|
||||
FPGA_REG=48
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
if [ $((DATA & 0x0F)) != 0 ] ; then
|
||||
echo PD Error: PD3$((DATA & 0x0F))
|
||||
fi
|
||||
|
||||
FPGA_REG=49
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
if [ $((DATA & 0x07)) != 0 ] ; then
|
||||
echo PD Error: PD4$((DATA & 0x07))
|
||||
fi
|
||||
|
||||
FPGA_REG=50
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
if [ $((DATA & 0x03)) != 0 ] ; then
|
||||
echo PD Error: PD5$((DATA & 0x03))
|
||||
fi
|
||||
|
||||
FPGA_REG=51
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
if [ $((DATA & 0x03)) != 0 ] ; then
|
||||
echo PD Error: PD6$((DATA & 0x03))
|
||||
fi
|
||||
|
||||
FPGA_REG=52
|
||||
DATA=$(i2cget -y $I2CBUS $FPGAADDR "$(printf "0x%x" $FPGA_REG)")
|
||||
if [ $((DATA & 0x0F)) != 0 ] ; then
|
||||
echo Thermal Error: H_0$((DATA & 0x0F))
|
||||
fi
|
||||
echo ------------- end of data -----------------
|
||||
@@ -0,0 +1,11 @@
|
||||
[Unit]
|
||||
Description=Transfer IP address to the FPGA
|
||||
BindsTo=sys-subsystem-net-devices-eth0.device
|
||||
After=sys-subsystem-net-devices-eth0.device
|
||||
|
||||
[Service]
|
||||
Type=simple
|
||||
ExecStart=/usr/bin/ip-to-fpga.sh
|
||||
|
||||
[Install]
|
||||
WantedBy=multi-user.target
|
||||
@@ -0,0 +1,33 @@
|
||||
#!/bin/bash
|
||||
|
||||
OLD_IP=""
|
||||
|
||||
while true
|
||||
do
|
||||
IP=$(ip a | awk '/inet.*global/ {split ($2,A,"/"); print A[1]}')
|
||||
|
||||
if [ "${IP}" != "${OLD_IP}" ]
|
||||
then
|
||||
if [ -n "${IP}" ]
|
||||
then
|
||||
IP_1=$(echo "${IP}" | cut -d "." -f 1)
|
||||
IP_2=$(echo "${IP}" | cut -d "." -f 2)
|
||||
IP_3=$(echo "${IP}" | cut -d "." -f 3)
|
||||
IP_4=$(echo "${IP}" | cut -d "." -f 4)
|
||||
else
|
||||
IP_1=0
|
||||
IP_2=0
|
||||
IP_3=0
|
||||
IP_4=0
|
||||
fi
|
||||
|
||||
echo "Transfer current IP address (${IP_1}.${IP_2}.${IP_3}.${IP_4}) to the FPGA"
|
||||
|
||||
i2cset -y 2 0x50 0 "${IP_1}"
|
||||
i2cset -y 2 0x50 1 "${IP_2}"
|
||||
i2cset -y 2 0x50 2 "${IP_3}"
|
||||
i2cset -y 2 0x50 3 "${IP_4}"
|
||||
OLD_IP=${IP}
|
||||
fi
|
||||
sleep 5
|
||||
done
|
||||
@@ -0,0 +1,25 @@
|
||||
DESCRIPTION = "Transfer BMC IP address to the FPGA"
|
||||
PR = "r1"
|
||||
LICENSE = "Apache-2.0"
|
||||
LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/Apache-2.0;md5=89aea4e17d99a7cacdbeed46a0096b10"
|
||||
|
||||
inherit systemd
|
||||
|
||||
SRC_URI = " file://ip-to-fpga.sh \
|
||||
file://ip-to-fpga.service \
|
||||
"
|
||||
|
||||
S = "${WORKDIR}"
|
||||
|
||||
DEPENDS = "systemd"
|
||||
RDEPENDS:${PN} = "bash"
|
||||
|
||||
SYSTEMD_SERVICE:${PN} = "ip-to-fpga.service"
|
||||
|
||||
do_install() {
|
||||
install -d ${D}${bindir}
|
||||
install -m 0755 ${S}/ip-to-fpga.sh ${D}${bindir}/
|
||||
|
||||
install -d ${D}${systemd_system_unitdir}
|
||||
install -m 0644 ${S}/ip-to-fpga.service ${D}${systemd_system_unitdir}
|
||||
}
|
||||
@@ -0,0 +1,50 @@
|
||||
SUMMARY = "OpenBMC for AMD - Applications"
|
||||
PR = "r1"
|
||||
|
||||
inherit packagegroup
|
||||
|
||||
PROVIDES = "${PACKAGES}"
|
||||
PACKAGES = " \
|
||||
${PN}-chassis \
|
||||
${PN}-fans \
|
||||
${PN}-flash \
|
||||
${PN}-system \
|
||||
"
|
||||
|
||||
PROVIDES += "virtual/obmc-chassis-mgmt"
|
||||
PROVIDES += "virtual/obmc-fan-mgmt"
|
||||
PROVIDES += "virtual/obmc-flash-mgmt"
|
||||
PROVIDES += "virtual/obmc-system-mgmt"
|
||||
|
||||
RPROVIDES:${PN}-chassis += "virtual-obmc-chassis-mgmt"
|
||||
RPROVIDES:${PN}-fans += "virtual-obmc-fan-mgmt"
|
||||
RPROVIDES:${PN}-flash += "virtual-obmc-flash-mgmt"
|
||||
RPROVIDES:${PN}-system += "virtual-obmc-system-mgmt"
|
||||
|
||||
SUMMARY:${PN}-chassis = "AMD Chassis"
|
||||
RDEPENDS:${PN}-chassis = " \
|
||||
x86-power-control \
|
||||
obmc-host-failure-reboots \
|
||||
"
|
||||
|
||||
SUMMARY:${PN}-fans = "AMD Fans"
|
||||
RDEPENDS:${PN}-fans = " \
|
||||
phosphor-pid-control \
|
||||
"
|
||||
|
||||
SUMMARY:${PN}-flash = "AMD Flash"
|
||||
RDEPENDS:${PN}-flash = " \
|
||||
phosphor-software-manager \
|
||||
"
|
||||
|
||||
SUMMARY:${PN}-system = "AMD System"
|
||||
RDEPENDS:${PN}-system = " \
|
||||
amd-fpga \
|
||||
bmcweb \
|
||||
dbus-sensors \
|
||||
entity-manager \
|
||||
ipmitool \
|
||||
phosphor-hostlogger \
|
||||
webui-vue \
|
||||
srvcfg-manager \
|
||||
"
|
||||
Reference in New Issue
Block a user