35 lines
1.0 KiB
Diff
35 lines
1.0 KiB
Diff
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From 7947dbbfb21e10e8fb0f852a14485cedf5df1d36 Mon Sep 17 00:00:00 2001
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From: Chanh Nguyen <chanh@os.amperecomputing.com>
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Date: Sun, 10 Oct 2021 11:57:20 +0700
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Subject: [PATCH] aspeed: Enable SPI master mode by default
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The ast2500 share the RGMII1 pin and the hw strap pins
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for SPI interface mode selection ( pin[12:13] ).
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In some systems, the RGMII/NCSI interface will use the pin.
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It makes the SPI interface mode setting is not correct.
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This patch will enable the SPI master mode by default.
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Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
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---
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board/aspeed/ast-g5/ast-g5.c | 3 +++
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1 file changed, 3 insertions(+)
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diff --git a/board/aspeed/ast-g5/ast-g5.c b/board/aspeed/ast-g5/ast-g5.c
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index e67a4bf8b2..82e9f81acc 100644
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--- a/board/aspeed/ast-g5/ast-g5.c
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+++ b/board/aspeed/ast-g5/ast-g5.c
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@@ -21,6 +21,9 @@ int board_init(void)
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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gd->flags = 0;
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+ //pin switch by trap[13:12] -- [0:1] Enable SPI Master
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+ ast_scu_spi_master(1); /* enable SPI master */
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+
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return 0;
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}
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--
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2.17.1
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