90 lines
2.5 KiB
Diff
90 lines
2.5 KiB
Diff
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From 0851611d47f99f5bbba29d3cb39e109a4ecdcb0e Mon Sep 17 00:00:00 2001
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From: wangjue <jue.wang2@luxshare-ict.com>
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Date: Fri, 11 Oct 2024 12:48:24 +0800
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Subject: [PATCH] Add I3C GPIO switch in dw-i3c-master driver
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Signed-off-by: wangjue <jue.wang2@luxshare-ict.com>
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---
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drivers/i3c/master/dw-i3c-master.c | 34 ++++++++++++++++++++++++++++++
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1 file changed, 34 insertions(+)
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diff --git a/drivers/i3c/master/dw-i3c-master.c b/drivers/i3c/master/dw-i3c-master.c
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index c29c609510e7..6d1ba40eca0f 100644
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--- a/drivers/i3c/master/dw-i3c-master.c
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+++ b/drivers/i3c/master/dw-i3c-master.c
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@@ -25,6 +25,7 @@
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#include <linux/regmap.h>
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#include <linux/reset.h>
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#include <linux/slab.h>
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+#include <linux/gpio.h>
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/*
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* Below bits are valid for I3Cx Global register (REG1) on AST2600 platform.
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@@ -373,6 +374,9 @@
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#define AST2600_I3C_IBI_MAX_PAYLOAD 255
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+#define SEL_CPU0_I3C_DDR_GPIO 921
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+#define SEL_CPU1_I3C_DDR_GPIO 922
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+
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struct dw_i3c_master_caps {
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u8 cmdfifodepth;
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u8 datafifodepth;
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@@ -3110,6 +3114,33 @@ static int dw_i3c_debugfs_init(struct dw_i3c_master *master)
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return 0;
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}
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+static void i3c_gpio_switch_bmc(struct dw_i3c_master *master)
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+{
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+ if (gpio_request(SEL_CPU0_I3C_DDR_GPIO, "dw-i3c-master")) {
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+ dev_err(master->dev, "unable to allocate SEL_CPU0_I3C_DDR_GPIO\n");
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+ return;
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+ }
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+
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+ if (gpio_request(SEL_CPU1_I3C_DDR_GPIO, "dw-i3c-master")) {
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+ dev_err(master->dev, "unable to allocate SEL_CPU0_I3C_DDR_GPIO\n");
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+ return;
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+ }
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+ gpio_direction_output(SEL_CPU0_I3C_DDR_GPIO, 1);
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+ gpio_direction_output(SEL_CPU1_I3C_DDR_GPIO, 1);
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+
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+ usleep_range(500, 1000);
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+}
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+
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+static void i3c_gpio_switch_bios(struct dw_i3c_master *master)
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+{
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+ gpio_direction_output(SEL_CPU0_I3C_DDR_GPIO, 0);
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+ gpio_direction_output(SEL_CPU1_I3C_DDR_GPIO, 0);
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+ usleep_range(500, 1000);
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+
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+ gpio_free(SEL_CPU0_I3C_DDR_GPIO);
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+ gpio_free(SEL_CPU1_I3C_DDR_GPIO);
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+}
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+
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static int dw_i3c_probe(struct platform_device *pdev)
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{
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const struct of_device_id *match;
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@@ -3149,6 +3180,7 @@ static int dw_i3c_probe(struct platform_device *pdev)
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spin_lock_init(&master->ibi.master.lock);
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platform_set_drvdata(pdev, master);
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+ i3c_gpio_switch_bmc(master);
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/* Information regarding the FIFOs/QUEUEs depth */
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ret = readl(master->regs + QUEUE_STATUS_LEVEL);
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@@ -3218,9 +3250,11 @@ static int dw_i3c_probe(struct platform_device *pdev)
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dev_info(&pdev->dev, "i3c bus %d registered, irq %d\n",
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master->base.bus_id, irq);
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+ i3c_gpio_switch_bios(master);
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return 0;
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err_assert_rst:
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+ i3c_gpio_switch_bios(master);
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reset_control_assert(master->core_rst);
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err_disable_core_clk:
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--
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2.34.1
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