186 lines
4.1 KiB
Diff
186 lines
4.1 KiB
Diff
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From 1fb38f86a77ec6656f87f427124a65dc6c0fdf5f Mon Sep 17 00:00:00 2001
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From: Logananth Sundararaj <logananth_s@hcl.com>
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Date: Tue, 8 Mar 2022 19:24:49 +0530
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Subject: [PATCH] spl-host-console-handle
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This patch adds four 1S server console through debug card
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connected to YosemiteV2 during boot.
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Handswitch in the adaptor card connected to AST2500 GPIOs as below,
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GPIOAA7 ---SW_ID8
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GPIOAA6 ---SW_ID4
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GPIOAA5 ---SW_ID2
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GPIOAA4 ---SW_ID1
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SW_ID8 SW_ID4 SW_ID2 SW_ID1 Position Descritpion
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L L L L 1 1s server slot1 select
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L L L H 2 1s server slot2 select
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L L H L 3 1s server slot3 select
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L L H H 4 1s server slot4 select
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L H L L 5 BMC Debug port select
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L H L H 6 1s server slot1 select
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L H H L 7 1s server slot2 select
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L H H H 8 1s server slot3 select
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H L L L 9 1s server slot4 select
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H L L H 10 BMC Debug port select
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BMC and Hosts UART control flow
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GPIOE0 --- DEBUG_UART_SEL_0
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GPIOE1 --- DEBUG_UART_SEL_1
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GPIOE2 --- DEBUG_UART_SEL_2
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GPIOE2 --- DEBUG_UART_RX_SEL_N
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SEL_2 SEL_1 SEL_0 RX_SEL_N CONSOLE
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0 0 0 0 SLOT1
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0 0 1 0 SLOT2
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0 1 0 0 SLOT3
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0 1 1 0 SLOT4
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1 0 0 1 BMC Debug
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Signed-off-by: Logananth Sundararaj <logananth_s@hcl.com>
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---
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arch/arm/mach-aspeed/ast2500/platform.S | 69 ++++++++++++++++++++++---
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1 file changed, 61 insertions(+), 8 deletions(-)
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diff --git a/arch/arm/mach-aspeed/ast2500/platform.S b/arch/arm/mach-aspeed/ast2500/platform.S
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index 137ed2c587..76a31c709a 100644
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--- a/arch/arm/mach-aspeed/ast2500/platform.S
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+++ b/arch/arm/mach-aspeed/ast2500/platform.S
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@@ -315,6 +315,59 @@ TIME_TABLE_DDR4_1600:
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str r1, [r0]
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.endm
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+ .macro console_slot1
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+ ldr r0, =0x1e780024
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+ ldr r1, [r0]
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+ orr r1, r1, #0xF
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+ str r1, [r0]
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+
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+ ldr r0, =0x1e780020
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+ ldr r1, [r0]
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+ and r1, r1, #0xFFFFFFF0
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+ orr r1, r1, #0x0
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+ str r1, [r0]
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+ .endm
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+
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+ .macro console_slot2
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+ ldr r0, =0x1e780024
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+ ldr r1, [r0]
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+ orr r1, r1, #0xF
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+ str r1, [r0]
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+
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+ ldr r0, =0x1e780020
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+ ldr r1, [r0]
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+ and r1, r1, #0xFFFFFFF0
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+ orr r1, r1, #0x1
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+ str r1, [r0]
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+ .endm
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+
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+ .macro console_slot3
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+ ldr r0, =0x1e780024
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+ ldr r1, [r0]
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+ orr r1, r1, #0xF
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+ str r1, [r0]
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+
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+ ldr r0, =0x1e780020
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+ ldr r1, [r0]
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+ and r1, r1, #0xFFFFFFF0
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+ orr r1, r1, #0x2
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+ str r1, [r0]
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+ .endm
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+
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+ .macro console_slot4
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+ ldr r0, =0x1e780024
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+ ldr r1, [r0]
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+ orr r1, r1, #0xF
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+ str r1, [r0]
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+
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+ ldr r0, =0x1e780020
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+ ldr r1, [r0]
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+ and r1, r1, #0xFFFFFFF0
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+ orr r1, r1, #0x3
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+ str r1, [r0]
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+ .endm
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+
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+
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.macro console_sel
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// Disable SoL UARTs[1-4]
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@@ -354,28 +407,28 @@ dbg_card_pres\@:
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ldr r1, =0x00
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cmp r0, r1
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bne case_pos2\@
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- console_bmc
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+ console_slot1
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b case_end\@
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case_pos2\@:
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//Test for position#2
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ldr r1, =0x01
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cmp r0, r1
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bne case_pos3\@
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- console_bmc
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+ console_slot2
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b case_end\@
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case_pos3\@:
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//Test for position#3
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ldr r1, =0x02
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cmp r0, r1
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bne case_pos4\@
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- console_bmc
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+ console_slot3
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b case_end\@
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case_pos4\@:
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//Test for position#4
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ldr r1, =0x03
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cmp r0, r1
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bne case_pos5\@
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- console_bmc
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+ console_slot4
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b case_end\@
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case_pos5\@:
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//Test for position#5
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@@ -389,28 +442,28 @@ case_pos6\@:
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ldr r1, =0x05
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cmp r0, r1
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bne case_pos7\@
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- console_bmc
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+ console_slot1
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b case_end\@
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case_pos7\@:
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//Test for position#7
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ldr r1, =0x06
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cmp r0, r1
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bne case_pos8\@
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- console_bmc
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+ console_slot2
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b case_end\@
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case_pos8\@:
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//Test for position#8
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ldr r1, =0x07
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cmp r0, r1
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bne case_pos9\@
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- console_bmc
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+ console_slot3
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b case_end\@
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case_pos9\@:
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//Test for position#9
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ldr r1, =0x08
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cmp r0, r1
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bne case_pos10\@
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- console_bmc
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+ console_slot4
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b case_end\@
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case_pos10\@:
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//Test for position#10
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--
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2.17.1
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