123 lines
3.9 KiB
Diff
123 lines
3.9 KiB
Diff
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From 34db1357ab3192f18629ceadf4ea33b948513fec Mon Sep 17 00:00:00 2001
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From: Olivier Deprez <olivier.deprez@arm.com>
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Date: Mon, 16 Nov 2020 10:14:02 +0100
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Subject: [PATCH 1/2] WIP: Enable managed exit
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This change declares OP-TEE SP as supporting managed exit in response to
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a NS interrupt triggering while the SWd runs.
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At init OP-TEE enables (HF_INTERRUPT_ENABLE) the managed exit virtual
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interrupt through the Hafnium para-virtualized interface.
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Physical interrupts are trapped to the SPMC which injects a managed exit
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interrupt to OP-TEE. The managed exit interrupt is acknowledged by
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OP-TEE by HF_INTERUPT_GET hvc call.
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Note: this code change is meant with in mind the SPMC runs at SEL2. It
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needs slight refactoring such that it does not break the SEL1 SPMC
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configuration.
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Change-Id: I9a95f36cf517c11048ff04680007f40259c4f636
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Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
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Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
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Upstream-Status: Pending [Not submitted to upstream yet]
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Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
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---
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core/arch/arm/kernel/boot.c | 12 ++++++++++++
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core/arch/arm/kernel/thread_a64.S | 11 ++++++++++-
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core/arch/arm/kernel/thread_spmc.c | 11 +++++++++++
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.../arm/plat-totalcompute/fdts/optee_sp_manifest.dts | 1 +
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4 files changed, 34 insertions(+), 1 deletion(-)
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diff --git a/core/arch/arm/kernel/boot.c b/core/arch/arm/kernel/boot.c
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index f173384d..466c042e 100644
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--- a/core/arch/arm/kernel/boot.c
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+++ b/core/arch/arm/kernel/boot.c
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@@ -1350,6 +1350,18 @@ static void init_secondary_helper(unsigned long nsec_entry)
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init_vfp_sec();
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init_vfp_nsec();
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+ /* Enable managed exit interrupt for secondary core. */
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+ __asm__ volatile (
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+ "mov x0, %0;"
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+ "mov x1, %1;"
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+ "mov x2, %2;"
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+ "mov x3, %3;"
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+ "hvc #0"
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+ : : "i" (0xff03), "i" (4), "i" (1), "i" (1));
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+
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+ IMSG("%s core %lu: enabled managed exit interrupt.",
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+ __func__, get_core_pos());
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+
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IMSG("Secondary CPU %zu switching to normal world boot", get_core_pos());
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}
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diff --git a/core/arch/arm/kernel/thread_a64.S b/core/arch/arm/kernel/thread_a64.S
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index d6baee4d..1b0c8f37 100644
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--- a/core/arch/arm/kernel/thread_a64.S
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+++ b/core/arch/arm/kernel/thread_a64.S
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@@ -1087,6 +1087,14 @@ END_FUNC el0_sync_abort
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bl dcache_op_louis
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ic iallu
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#endif
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+
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+ /* HF_INTERRUPT_GET */
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+ mov x0, #0xff04
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+ hvc #0
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+ /* Expect managed exit interrupt */
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+ cmp x0, #4
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+ bne .
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+
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/*
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* Mark current thread as suspended
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*/
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@@ -1204,8 +1212,9 @@ LOCAL_FUNC elx_irq , :
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#endif
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END_FUNC elx_irq
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+#define HF_MANAGED_EXIT 1
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LOCAL_FUNC elx_fiq , :
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-#if defined(CFG_ARM_GICV3)
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+#if defined(CFG_ARM_GICV3) || defined (HF_MANAGED_EXIT)
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foreign_intr_handler fiq
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#else
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native_intr_handler fiq
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diff --git a/core/arch/arm/kernel/thread_spmc.c b/core/arch/arm/kernel/thread_spmc.c
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index ea9e8f03..15577e7e 100644
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--- a/core/arch/arm/kernel/thread_spmc.c
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+++ b/core/arch/arm/kernel/thread_spmc.c
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@@ -1518,6 +1518,17 @@ static TEE_Result spmc_init(void)
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my_endpoint_id = spmc_get_id();
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DMSG("My endpoint ID %#x", my_endpoint_id);
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+ /* Enable managed exit interrupt for boot core. */
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+ __asm__ volatile (
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+ "mov x0, %0;"
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+ "mov x1, %1;"
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+ "mov x2, %2;"
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+ "mov x3, %3;"
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+ "hvc #0"
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+ : : "i" (0xff03), "i" (4), "i" (1), "i" (1));
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+
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+ IMSG("%s enabled managed exit interrupt.", __func__);
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+
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return TEE_SUCCESS;
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}
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#endif /* !defined(CFG_CORE_SEL1_SPMC) */
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diff --git a/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts b/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts
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index 0bfe33f3..00cfa5b2 100644
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--- a/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts
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+++ b/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts
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@@ -24,6 +24,7 @@
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xlat-granule = <0>; /* 4KiB */
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boot-order = <0>;
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messaging-method = <0x3>; /* Direct request/response supported */
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+ managed-exit; /* Managed exit supported */
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device-regions {
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compatible = "arm,ffa-manifest-device-regions";
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--
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2.34.1
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